- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3775 > CAT9555YI-T2 (ON Semiconductor)IC I/O EXPANDER I2C 16B 24TSSOP PDF資料下載
參數(shù)資料
| 型號： | CAT9555YI-T2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 16B 24TSSOP |
| 標準包裝： | 1 |
| 接口： | I²C，串行，SMBus |
| 輸入/輸出數(shù)： | 16 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 標準包裝 |
| 包括： | POR |
| 產(chǎn)品目錄頁面： | 807 (CN2011-ZH PDF) |
| 其它名稱： | CAT9555YI-T2DKR |
CAT9555
http://onsemi.com
8
FUNCTIONAL DESCRIPTION
The CAT9555 general purpose input/output (GPIO)
peripheral provides up to sixteen I/O ports, controlled
through an I2C compatible serial interface.
The CAT9555 supports the I2C Bus data transmission
protocol. This InterIntegrated Circuit Bus protocol defines
any device that sends data to the bus to be a transmitter and
any device receiving data to be a receiver. The transfer is
controlled by the Master device which generates the serial
clock and all START and STOP conditions for bus access.
The CAT9555 operates as a Slave device. Both the Master
device and Slave device can operate as either transmitter or
receiver, but the Master device controls which mode is
activated.
I2C Bus Protocol
The features of the I2C bus protocol are defined as follows:
1. Data transfer may be initiated only when the bus is
not busy.
2. During a data transfer, the data line must remain
stable whenever the clock line is high. Any
changes in the data line while the clock line is high
will be interpreted as a START or STOP condition
(Figure 7).
START and STOP Conditions
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of SDA
when SCL is HIGH. The CAT9555 monitors the SDA and
SCL lines and will not respond until this condition is met.
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Device Addressing
After the bus Master sends a START condition, a slave
address byte is required to enable the CAT9555 for a read or
write operation. The four most significant bits of the slave
address are fixed as binary 0100 (Figure 8). The CAT9555
uses the next three bits as address bits.
The address bits A2, A1 and A0 are used to select which
device is accessed from maximum eight devices on the same
bus. These bits must compare to their hardwired input pins.
The 8th bit following the 7bit slave address is the R/W bit
that specifies whether a read or write operation is to be
performed. When this bit is set to “1”, a read operation is
initiated, and when set to “0”, a write operation is selected.
Following the START condition and the slave address byte,
the CAT9555 monitors the bus and responds with an
acknowledge (on the SDA line) when its address matches the
transmitted slave address. The CAT9555 then performs a read
or a write operation depending on the state of the R/W bit.
Figure 7. START/STOP Condition
Figure 8. CAT9555 Slave Address
0
10
0
A2
A1 A0
SLAVE ADDRESS
FIXED
PROGRAMMABLE
HARDWARE SELECTABLE
R/W
START CONDITION
STOP CONDITION
SDA
SCL
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The acknowledging
device pulls down the SDA line during the ninth clock cycle,
signaling that it received the 8 bits of data. The SDA line
remains stable LOW during the HIGH period of the
acknowledge related clock pulse (Figure 9).
The CAT9555 responds with an acknowledge after
receiving a START condition and its slave address. If the
device has been selected along with a write operation, it
responds with an acknowledge after receiving each data byte.
When the CAT9555 begins a READ mode it transmits 8
bits of data, releases the SDA line, and monitors the line for
an acknowledge. Once it receives this acknowledge, the
CAT9555 will continue to transmit data. If no acknowledge
is sent by the Master, the device terminates data transmission
and waits for a STOP condition. The master must then issue
a stop condition to return the CAT9555 to the standby power
mode and place the device in a known state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 616-220-311 | UNIGUIDE 9" X .205" GREY |
| PCA9671D,118 | IC I/O EXPANDER I2C 16B 24SOIC |
| 616-220-310 | UNIGUIDE 9" X .141" GREY |
| 3448-58 | STRAIN RELIEF 50 POS |
| 3448-56 | STRAIN RELIEF 34 POS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CATA6B3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ceramic Surface Mount TCXO |
| CATABB3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Ceramic Surface Mount TCXO |
| CAT-AC-12-M | 功能描述:CAT TOOLING 制造商:samtec inc. 系列:* 零件狀態(tài):在售 標準包裝:1 |
| CAT-AC-16-M | 功能描述:CAT TOOLING 制造商:samtec inc. 系列:* 零件狀態(tài):在售 標準包裝:1 |
| CAT-AC-22-M | 功能描述:CAT TOOLING 制造商:samtec inc. 系列:* 零件狀態(tài):在售 標準包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。