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參數(shù)資料
| 型號(hào)： | CBT6832CDGG |
| 廠(chǎng)商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | 16-bit 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion |
| 中文描述： | CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP2-56 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 67K |
| 代理商： | CBT6832CDGG |
Philips Semiconductors
Product specification
CBT6832C
16-bit 1-of-2 multiplexer/demultiplexer with precharged outputs
and charge pump undershoot protection for live insertion
2000 Jul 18
5
AC CHARACTERISTICS
V
CC
= 5.0 V
±
0.5 V; GND = 0 V
;
C
L
= 50 pF, R
L
= 500
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
UNIT
MIN
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
1
A to B
Bus enable time
SEL to A, B
Bus disable time
SEL to A, B
0.25
ns
1
1
1
1
7.0
6.0
7.5
7.0
ns
ns
NOTES:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
AC WAVEFORMS
V
M
= 1.5 V, V
IN
= GND to 3.0 V
INPUT
1.5V
OUTPUT
t
PLH
t
PHL
SA00028
1.5V
1.5V
1.5V
3 V
0 V
V
OH
V
OL
Waveform 1. Input (An) to Output (Bn) Propagation Delays
Output Control
(Low-level
enabling
1.2 V
t
PZH
t
PHZ
V
OH
V
OL
t
PZL
t
PLZ
3.5V
0V
V
OL
+ 0.3V
V
OH
– 0.3V
1.5 V
1.5 V
1.5 V
0V
3V
Output
Waveform 1
S1 at 7 V
(see Note)
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
Output
Waveform 2
S1 at Open
(see Note)
SA00530
Waveform 2. 3-State Output Enable and Disable Times
TEST CIRCUIT AND WAVEFORMS
C
L
= 50 pF
500
Load Circuit
DEFINITIONS
C
L
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
TEST
S1
t
pd
open
t
PLZ
/t
PZL
7 V
t
PHZ
/t
PZH
open
SA00012
500
From Output
Under Test
S1
7 V
Open
GND
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| CBT6832CDGG,112 | 功能描述:IC 16BIT 1OF2 MUX/DEMUX 56TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 邏輯 - 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 系列:74CBT 標(biāo)準(zhǔn)包裝:25 系列:74HC 類(lèi)型:解碼器 電路:1 x 2:4 獨(dú)立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| CBT6832CDGG,118 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 16-BIT 1-OF-2 MU/DEMUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線(xiàn)路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| CBT6832D | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion |
| CBT6832DDGG | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and charge pump undershoot protection for live insertion |
| CBT6832DDGG,112 | 功能描述:IC 16BIT 1OF2 MUX/DEMUX 56TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 邏輯 - 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 系列:74CBT 標(biāo)準(zhǔn)包裝:25 系列:74HC 類(lèi)型:解碼器 電路:1 x 2:4 獨(dú)立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
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