參數(shù)資料
型號(hào): CBTL06122BHF
廠商: NXP Semiconductors N.V.
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: High-performance DisplayPort-PCIe Gen2 hex display multiplexer
封裝: CBTL06122AHF<SOT1033-1 (HWQFN56R)|<<http://www.nxp.com/packages/SOT1033-1.html<1<Always Pb-free,;CBTL06122BHF<SOT1033-1 (HWQFN56R)|<<http://www.nxp.com/packages/SOT1033-1
文件頁(yè)數(shù): 18/19頁(yè)
文件大小: 104K
代理商: CBTL06122BHF
CBTL06122_2
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 April 2009
8 of 19
NXP Semiconductors
CBTL06122
High-performance DP/PCIe Gen2 hex display multiplexer
[1]
HWQFN56R package die supply ground is connected to both GND pins and exposed center pad. GND pins must be connected to
supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
X
15
19
pass-through output
from RX1
input
X
is an analog ‘pass-through’ output corresponding to the
RX1
input. The path from RX1 to X is matched with the
path from RX1+ to X+. X+ and X
form a differential pair
when the pass-through MUX mode is selected.
D0+
43
54
pass-through output 1,
option 1
Analog ‘pass-through’ output 1 corresponding to IN_0+
and IN_0
, when SEL = 1.
D0
42
53
D1+
41
52
pass-through output 2,
option 1
Analog ‘pass-through’ output 1 corresponding to IN_1+
and IN_1
, when SEL = 1.
D1
40
51
D2+
39
47
pass-through output 3,
option 1
Analog ‘pass-through’ output 1 corresponding to IN_2+
and IN_2
, when SEL = 1.
D2
38
46
D3+
37
45
pass-through output 4,
option 1
Analog ‘pass-through’ output 1 corresponding to IN_3+
and IN_3
, when SEL = 1.
D3
36
44
TX0+
54
43
pass-through output 1,
option 2
Analog ‘pass-through’ output 2 corresponding to IN_0+
and IN_0
, when SEL = 0.
TX0
53
42
TX1+
52
41
pass-through output 2,
option 2
Analog ‘pass-through’ output 2 corresponding to IN_1+
and IN_1
, when SEL = 0.
TX1
51
40
TX2+
47
39
pass-through output 3,
option 2
Analog ‘pass-through’ output 2 corresponding to IN_2+
and IN_2
, when SEL = 0.
TX2
46
38
TX3+
45
37
pass-through output 4,
option 2
Analog ‘pass-through’ output 2 corresponding to IN_3+
and IN_3
, when SEL = 0.
TX3
44
36
VDD
6, 17, 22,
27, 34,
55
6, 17, 22,
27, 34,
55
3.3 V supply
Supply voltage (3.3 V
± 10 %).
AUX+
26
33
differential input
High-speed differential pair for AUX signals.
AUX
25
32
differential input
OUT+
12
14
differential input
High-speed differential pair for PCIe RX0+ signal.
OUT
13
15
differential input
High-speed differential pair for PCIe RX0
signal.
1, 11, 16,
20, 21,
28, 29,
35, 48,
49, 56
1, 11, 16,
20, 21,
28, 29,
35, 48,
49, 56
supply ground
Ground.
SPARE
23
30
single-ended input
Spare channel for general-purpose switch use.
Connected to pin X
when SEL = 1.
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
Pinout A Pinout B
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