參數(shù)資料
型號： CBTL06DP211EE
廠商： NXP SEMICONDUCTORS
元件分類： 編、解碼器及復用、解復用
英文描述： DisplayPort Gen1 2 : 1 multiplexer
中文描述： MULTIPLEXER, PBGA48
封裝： 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, PLASTIC, TFBGA-48
文件頁數(shù)： 15/18頁
文件大?。?/td> 144K
代理商： CBTL06DP211EE
CBTL06DP211
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 21 February 2011
6 of 18
NXP Semiconductors
CBTL06DP211
DisplayPort Gen1 2 : 1 multiplexer
7.
Functional description
The CBTL06DP211 uses a 3.3 V power supply. All main signal paths are implemented
using high-bandwidth pass-gate technology and are non-directional. No clock or reset
signal is needed for the multiplexer to function.
The switch position for the main channels is selected using the select signal GPU_SEL.
Additionally, the signal DDC_AUX_SEL selects between AUX and DDC positions for the
DDC / AUX channel. The detailed operation is described in Section 7.1.
7.1 Multiplexer/switch select functions
The internal multiplexer switch position is controlled by two logic inputs GPU_SEL and
DDC_AUX_SEL as described below.
DDC_CLK1
H8
differential I/O
Pair of single-ended terminals for DDC clock and data signals,
path 1, left-side.
DDC_DAT1
J8
differential I/O
DDC_CLK2
H5
differential I/O
Pair of single-ended terminals for DDC clock and data signals,
path 2, left-side.
DDC_DAT2
J5
differential I/O
AUX+
H2
differential I/O
High-speed differential pair for AUX or single-ended DDC signals,
right-side.
AUX
H1
differential I/O
HPD_1
J2
single-ended I/O
Single ended channel for the HPD signal, path 1, left-side.
HPD_2
H3
single-ended I/O
Single ended channel for the HPD signal, path 2, left-side.
HPDIN
J1
single-ended I/O
Single ended channel for the HPD signal, right-side.
VDD
A2, J4
power supply
3.3 V power supply.
GND
B3, C8,
G8, H4,
H7
ground
Ground.
Table 2.
Pin description …continued
Symbol
Ball
Type
Description
Table 3.
Multiplexer/switch select control for IN and OUT channels
GPU_SEL
IN1_n
IN2_n
0
active; connected to OUT_n
high-impedance
1
high-impedance
active; connected to OUT_n
Table 4.
Multiplexer/switch select control for HPD channel
GPU_SEL
HPD1
HPD2
0
active; connected to HPDIN
high-impedance
1
high-impedance
active; connected to HPDIN
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相關代理商/技術參數(shù)
參數(shù)描述
CBTL06DP211EE,118 功能描述:編碼器、解碼器、復用器和解復用器 GEN 1 2.7 GBPS 6CH 2:1 MULTI/DEMUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
CBTL06DP212 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL06DP212 provides an additional level of multiplexing of AUX and DDC signals delivering true flexibility and choice.
CBTL06DP212EE 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CBTL06DP212 provides an additional level of multiplexing of AUX and DDC signals delivering true flexibility and choice.
CBTL06DP212EE,118 功能描述:編碼器、解碼器、復用器和解復用器 GEN 2 5.4 GBPS 6CH 2:1 MULTIPLEXER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
CBTL06DP213EE,118 功能描述:編碼器、解碼器、復用器和解復用器 DISPLAYPORT MULTIPLEXER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
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