參數(shù)資料
型號: CCU3000-I
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: 微控制器/微處理器
英文描述: Central Control Unit
中文描述: MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 13/77頁
文件大?。?/td> 837K
代理商: CCU3000-I
CCU 3000, CCU 3000-I
CCU 3001, CCU 3001-I
MICRONAS INTERMETALL
13
write:
bit 0
bit 1 1... Write 16 bit
bit 2 1... Read 8 bit
bit 3 1... Read 16 bit
1... Write 8 bit
1 byteData rate (5 bits) = fosc
4.n
Only one of the bits 0 to 3 in the control register should
be set. If all bits are set to ‘0‘, a reset of the interface is
done, thus deleting telegrams still waiting for access to
the bus. The IM bus addresses for the slave registers
are:
Slave register
1
2
3
IM bus address
02 H
03 H
04 H
Fig. 2–13:
IM bus interface
INT
INT
Data rate
n
Master
Interface
transmission
completed
slave
register 1 (IM Bus
address 02H)
received data
(1 byte)
Mode
Slave
Interface
Slave
Slave
2
Slave
3
1
Contr.
Data
Addr.
Rate
ID
Data
CLK
3
4
Master
Ready
IM Bus addresses
2, 3 and 4
Data rate:
4 .
fosc
4
.f
IM
fosc
f
IM
;
n =
=
CPU
data bus
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