參數(shù)資料
型號: CD-700-LAF-NGB-51.840
英文描述: IC Flash Mem PARL 2.7v To 3.6v 8-MBit 512kx16/1mx8 70ns 48FBGA
中文描述: 鎖相環(huán)
文件頁數(shù): 14/14頁
文件大?。?/td> 141K
代理商: CD-700-LAF-NGB-51.840
CD-700, VCXO Based PLL
Vectron International
166 Glover Avenue, Norwalk, CT 06856 Tel: 1-88-VECTRON-1 http://www.vectron.com
Layout Considerations
To achieve stable, low noise performance good analog layout techniques should be incorporated and a
partial list includes:
The CD-700 should be treated more like an analog device and the power supply must be well decoupled
with a good quality RF 0.01 uf capacitor in parrallel with a 0.1 uF capacitor, located as close to pin 14 as
possible and connected to ground. In some cases, a pi filter such as a large capacitor (10uF) to ground, a
series ferrite bead or inductor, and 0.01 uf and 100 pf capacitor to ground to decouple the device supply.
The traces for the OUT1, OUT2, RCLK and RDATA ouputs should be kept as short as possible. It is
common practice to use a series resistor – 50 to 100 ohms – in order to reduce reflections if these traces
are more than a couple of inches long. Also OUT1, OUT2, RCLK and RDATA should not be routed
directly underneath the device.
The op-amp loop filter components should be kept as close to the device as possible and the feedback
capacitor should be located close the op-amp input terminal. The loop filter capacitor(s) should be low
leakage and polarized capacitors are allowed keeping this is mind.
Unused outputs should be left floating and it is not required to load or terminate them (such as an PECL or
ECL output). Loading unused outputs will only increase current consumption.
相關(guān)PDF資料
PDF描述
CD-700-LAF-NHB-12.000 IC Flash Mem PARL 2.7v To 3.6v 8-MBit 512kx16/1mx8 90ns 48TSOP
CD-700-LAF-NHB-12.288 IC 8MEG FLSH (512KX16) TOP SE
CD-700-LAF-NHB-12.352 Phase-Locked Loop
CD-700-LAF-NHB-13.000 Phase-Locked Loop
CD-700-LAF-NHB-16.000 Phase-Locked Loop
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