- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378446 > CH7013A-T (Electronic Theatre Controls, Inc.) Digital PC to TV Encoder PDF資料下載
參數(shù)資料
| 型號： | CH7013A-T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Digital PC to TV Encoder |
| 中文描述： | 數(shù)碼電腦電視編碼器 |
| 文件頁數(shù)： | 34/46頁 |
| 文件大小： | 249K |
| 代理商： | CH7013A-T |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
CHRONTEL
CH7013A
34
201-0000-041 Rev. 1.0, 6/14/2000
Register Descriptions
(continued)
Power Management Register
Symbol: PMR
Address: 0EH
Bits: 5
This register provides control of the power management functions, a software reset (Reset*) and the SCART output
enable. The CH7013A provides programmable control of its operating states, as described in the table below.
Reset* (bit 3) is soft reset. Setting this bit will reset all circuitry requiring a power on reset, except for this bit itself
and the serial port.
SCART (bit 4) is the SCART enable. Setting SCART = 0 means the CH7013A will operate normally, outputting
Y/C and CVBS from the three DACs. SCART=1 enables SCART output, which will cause R, G and B to be output
from the DACs and composite sync from the CSYNC pin.
Note:
For complete details regarding the operation of these modes, see the
Power Management
in
Functional Description
sections.
Connection Detect Register
Symbol: CDR
Address: 10H
Bits: 4
The Connection Detect Register provides a means to sense the connection of a TV to either S-Video or Composite
video outputs. The status bits, YT, CT, and CVBST correspond to the DAC outputs for S-Video (Y and C outputs)
and Composite video (CVBS), respectively. However, the values contained in these status bits are NOT VALID
until a sensing procedure is performed. Use of this register requires a sequence of events to enable the sensing of
outputs, then reading out the applicable status bits. The detection sequence works as follows:
1. Ensure the power management register Bits 2-0 are set to 011 (normal mode).
Bit:
Symbol:
Type:
Default:
7
6
5
4
3
2
1
0
SCART
Reset*
PD2
PD1
PD0
R/W
R/W
R/W
R/W
R/W
0
1
0
1
1
Table 23. Power Management
PD[2:0]
Operating State
Functional Description
000
001
Composite Off
Power Down
CVBS DAC is powered down
Most pins and circuitry are disabled (except for the buffered clock outputs
which are limited to the 14MHz output and VCO divided outputs).
010
011
1XX
S-Video Off
Normal (On)
Full Power Down
S-Video DACs are powered down
All circuits and pins are active.
All circuitry is powered down, except serial port
Bit:
Symbol:
Type:
Default:
7
6
5
4
3
YT
2
CT
1
CVBST
0
SENSE
R
R
R
W
0
0
0
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CH7013A-V | Digital PC to TV Encoder |
| CHB1143 | CHB1143 |
| CHF12545CBF | 500 W Power RF Flanged Chip Termination |
| CHF12545CBF500L | 500 W Power RF Flanged Chip Termination |
| CHF12545CBF500R | 500 W Power RF Flanged Chip Termination |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CH7013A-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7013B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7013B-D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7013B-DF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7013B-DF-TR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。