參數(shù)資料
型號(hào): CK-V6-ML623-G
廠商: Xilinx Inc
文件頁(yè)數(shù): 5/11頁(yè)
文件大?。?/td> 0K
描述: BOARD DEV V6 WITH TX
產(chǎn)品培訓(xùn)模塊: Virtex-6 FPGA Overview
標(biāo)準(zhǔn)包裝: 1
系列: Virtex® 6 LXT
類(lèi)型: FPGA
適用于相關(guān)產(chǎn)品: Virtex? 6 LXT,XC6VLX240T
所含物品: 板,線纜,文檔,電源
Virtex-6 Family Overview
DS150 (v2.4) January 19, 2012
Product Specification
3
Virtex-6 FPGA Device-Package Combinations and Maximum I/Os
Virtex-6 LXT and SXT FPGA package combinations with the maximum available I/Os per package are shown in Table 2.
Virtex-6 HXT FPGA package combinations with the maximum available I/Os per package are shown in Table 3.
Table 2: Virtex-6 LXT and SXT FPGA Device-Package Combinations and Maximum Available I/Os
Package
FF484
FFG484
FF784
FFG784
FF1156
FFG1156
FF1759
FFG1759
FF1760
FFG1760
Size (mm)
23 x 23
29 x 29
35 x 35
42.5 x 42.5
Device
GTXs
I/O
GTXs
I/O
GTXs
I/O
GTXs
I/O
GTXs
I/O
XC6VLX75T
8
240
12
360
XC6VLX130T
8
240
12
400
20
600
XC6VLX195T
12
400
20
600
XC6VLX240T
12
400
20
600
24
720
XC6VLX365T
20
600
24
720
XC6VLX550T
36
840
0
1200
XC6VLX760
0
1200
XC6VSX315T
20
600
24
720
XC6VSX475T
20
600
36
840
Notes:
1.
Flip-chip packages are also available in Pb-Free versions (FFG).
Table 3: Virtex-6 HXT FPGA Device-Package Combinations and Maximum Available I/Os
Package
FF1154
FFG1154
FF1155
FFG1155
FF1923
FFG1923
FF1924
FFG1924
Size (mm)
35x35
35 x 35
45 x 45
45x45
Device
GTXs
GTHs
I/O
GTXs
GTHs
I/O
GTXs
GTHs
I/O
GTXs
GTHs
I/O
XC6VHX250T
48
0
320
XC6VHX255T
24
12
440
24
480
XC6VHX380T
48
0
320
24
12
440
40
24
720
48
24
640
XC6VHX565T
40
24
720
48
24
640
Notes:
1.
Flip-chip packages are also available in Pb-Free versions (FFG).
相關(guān)PDF資料
PDF描述
CK-V6-ML623-G-J BOARD DEV V6 WITH TX
ECM18DRKH-S13 CONN EDGECARD 36POS .156 EXTEND
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