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參數(shù)資料
| 型號(hào)： | CLPARK-FREQ |
| 廠商： | RALTRON ELECTRONICS CORP |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 0.75 MHz - 800 MHz, LVDS OUTPUT |
| 文件頁(yè)數(shù)： | 2/3頁(yè) |
| 文件大小： | 54K |
| 代理商： | CLPARK-FREQ |
CLOCK
Page 2 of 3
RAL T RON EL ECT R ONICS CORP.
! 10651 N . W . 19
th St ! Mi ami, Florida 33172 ! U.S.A.
phone: (305) 593-6033
! fax: (305) 594-3973 ! e-mail: sales@raltron.com ! WEB: http://www.raltron.com
123
4
5
6
.1
97
±
.0
08
.276 ±.008
7.0 ±0.2
5.
0
±
0.
2
INDICATES PIN 1.
.079 MAX.
2.00 MAX.
.200
.100
5.08
2.54
.1
50
3.
81
.055
1.40
TYP.
.0
50
1.
27
.079 TYP.
2.00 TYP.
.100
2.54
.071
1.80
SOLDER PATTERN
2.20
.087
*1 Test Conditions Unless Stated Otherwise: Nominal Vcc, Nominal Load, +25
±3°C
*2 Frequency Dependent
*3 Not All Stabilities Available With All Temperature Ranges—Please Consult Factory For Availability
*4 Measured with Wavecrest SIA-3000A 10,000, Cycles no filtering
*5 Calculated from Agilent 5500 phase noise measurements
*6 Measured with Agilent 5500
$
$ PART NUMBERING SYSTEM:
SERIES
SYMMETRY
TEMPERATURE
RANGE (°C)
FREQUENCY
STABILITY
(Overall)
FREQUENCY
(MHz)
Enable/Disable
CLP: UHF +3.3Vdc Clock with LVDS
Comp. Output
A: 40/60 to 60/40%
T: 45/55 to 55/45%
R: 0…+50
S: 0…+70
U: -20…+70
V: -40…+85**
K:
±20 ppm**
I:
±25 ppm
H:
±50 ppm
J:
±100 ppm
0.75…800.000
Enable High – standard
(Omit Suffix)
EL; Enable Low
EXAMPLE: -155.520
Clock Oscillator, 7x5mm Package, +3.3 VDC Supply Voltage, LVDS Output, Standard Symmetry, 0…+70
°C Operating
Temperature Range,
±50 ppm Total Frequency Stability, 155.520 MHz
** ±20ppm stability may not be available at all combinations, please consult the factory for any custom requirements.
$
$ MECHANICAL PARAMETERS:
OUTLINE TOLERANCE:
±0.006” / 0.15mm
(Unless otherwise specified)
PIN FUNCTIONS:
[1] ENABLE/ DISABLE
[2] NO CONNECT
[3] CASE GROUND
[4] OUTPUT
[5] COMP. OUTPUT
[6] SUPPLY VOLTAGE
MARKING:
CLPASH
155.52
RAL D/C
*0.01
F external by-pass
filter is recommended as seen on solder
pattern.
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