參數(shù)資料
型號(hào): CLVC1G125QDBVRQ1
廠商: Texas Instruments
文件頁(yè)數(shù): 10/14頁(yè)
文件大?。?/td> 0K
描述: IC BUS BUFF TRI-ST N-INV SOT23-5
標(biāo)準(zhǔn)包裝: 1
系列: 74LVC
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相
元件數(shù): 1
每個(gè)元件的位元數(shù): 1
輸出電流高,低: 24mA,24mA
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SC-74A,SOT-753
供應(yīng)商設(shè)備封裝: SOT-23-5
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 981 (CN2011-ZH PDF)
其它名稱: 296-23463-6
PARAMETER MEASUREMENT INFORMATION
t
h
t
su
From Output
Under Test
C
(see Note A)
L
LOAD CIRCUIT
S1
V
LOAD
Open
GND
R
L
Data Input
Timing Input
0 V
t
W
Input
0 V
Input
Output
Waveform 1
S1 at V
(see Note B)
LOAD
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
0 V
≈0 V
Output
TEST
S1
t
/t
PLH
PHL
Open
Output
Control
V
M
V
M
V
M
V
M
V
M
3.3 V
0.3 V
±
5 V
0.5 V
±
500
500
V
CC
R
L
6 V
2 × V
CC
V
LOAD
C
L
50 pF
0.3 V
V
3 V
V
I
1.5 V
V
CC/2
V
M
≤2.5 ns
INPUTS
R
L
t /t
r
f
V
CC
V
LOAD
t /t
PLZ
PZL
GND
t
/t
PHZ
PZH
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. C includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, Z = 50
.
D. The outputs are measured one at a time, with one transition per measurement.
E. t
and t
are the same as t .
F. t
and t
are the same as t .
G. t
and t
are the same as t .
H. All parameters and waveforms are not applicable to all devices.
L
O
PLZ
PHZ
dis
PZL
PZH
en
PLH
PHL
pd
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
V
I
V
M
V
M
V
/2
LOAD
t
PZL
t
PLZ
t
PHZ
t
PZH
V
OH
V
+ V
OL
V
M
V
M
V
M
V
M
V
OL
V
OH
V
I
V
I
V
OH
V
OL
V
M
V
M
V
M
V
M
t
PLH
t
PHL
t
PLH
t
PHL
www.ti.com........................................................................................................................................................... SGES002C – APRIL 2003 – REVISED APRIL 2008
Figure 1. Load Circuit and Voltage Waveforms
Copyright 2003–2008, Texas Instruments Incorporated
5
Product Folder Link(s): SN74LVC1G125-Q1
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