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參數(shù)資料
| 型號(hào)： | CM6824IP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | LOW START-UP CURRENT PFC/PWM CONTROLLER COMBO |
| 中文描述： | 低啟動(dòng)電流式PFC / PWM控制器組合 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 342K |
| 代理商： | CM6824IP |
CM6824
L
OW
S
TART-
U
P
C
URRENT
PFC/PWM C
ONTROLLER
C
OMBO
where C
SS
is the required soft start capacitance, and the
t
DEALY
is the desired start-up delay.
It is important that the time constant of the PWM soft-start
allow the PFC time to generate sufficient output power for
the PWM section. The PWM start-up delay should be at
least 5ms.
Solving for the minimum value of C
SS
:
A
20
μ
= 80nF
2002/09/20
Preliminary
Rev. 1.1
Champion Microelectronic Corporation
Page 13
C
SS
= 5ms x
1.25V
Caution should be exercised when using this minimum soft
start capacitance value because premature charging of the
SS capacitor and activation of the PWM section can result if
VFB is in the hysteresis band of the V
IN
OK comparator at
start-up. The magnitude of V
FB
at start-up is related both to
line voltage and nominal PFC output voltage. Typically, a
1.0μF soft start capacitor will allow time for V
FB
and PFC
out to reach their nominal values prior to activation of the
PWM section at line voltages between 90Vrms and
265Vrms.
Generating V
CC
After turning on CM6824 at 13V, the operating voltage can
vary from 10V to 19.4V. The threshold voltage of VCC OVP
comparator is 19.4V. The hysteresis of VCC OVP is 1.5V.
When VCC see 19.4V, PFCOUT will be low, and PWM
section will not be disturbed. That’s the two ways to
generate VCC. One way is to use auxiliary power supply
around 15V, and the other way is to use bootstrap winding
to self-bias CM6824 system. The bootstrap winding can be
either taped from PFC boost choke or from the transformer
of the DC to DC stage.
The ratio of winding transformer for the bootstrap should be
set between 18V and 15V. A filter network is recommended
between VCC (pin 13) and bootstrap winding. The resistor of
the filter can be set as following.
R
FILTER
x I
VCC
~ 2V, I
VCC
= I
OP
+ (Q
PFCFET
+ Q
PWMFET
) x fsw
I
OP
= 3mA (typ.)
If anything goes wrong, and VCC goes beyond 19.4V, the
PFC gate (pin 12) drive goes low and the PWM gate drive
(pin 11) remains function. The resistor’s value must be
chosen to meet the operating current requirement of the
CM6824 itself (5mA, max.) plus the current required by the
two gate driver outputs.
EXAMPLE:
With a wanting voltage called, V
BIAS
,of 18V, a VCC of 15V
and the CM6824 driving a total gate charge of 90nC at
100kHz (e.g. 1 IRF840 MOSFET and 2 IRF820 MOSFET),
the gate driver current required is:
I
GATEDRIVE
= 100kHz x 90nC = 9mA
V
V
+
R
BIAS
=
9mA
5mA
+
Choose R
BIAS
= 214
The CM6824 should be locally bypassed with a 1.0μF
ceramic capacitor. In most applications, an electrolytic
capacitor of between 47μF and 220μF is also required across
the part, both for filtering and as part of the start-up bootstrap
circuitry.
R
BIAS
=
G
CC
CC
BIAS
I
I
15V
18V
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