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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | COP8SAA716M7 |
| 寤犲晢锛� | National Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 37/62闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC MCU OTP 8BIT 1K POR 16-SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 45 |
| 绯诲垪锛� | COP8™ 8SA |
| 鏍稿績铏曠悊鍣細 | COP8 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 10MHz |
| 閫ｉ€氭€э細 | Microwire/Plus锛圫PI锛� |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 12 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 1KB锛�1K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | OTP |
| RAM 瀹归噺锛� | 64 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 16-SOIC锛�0.295"锛�7.50mm 瀵級 |
| 鍖呰锛� | 绠′欢 |
| 鍏跺畠鍚嶇ū锛� | *COP8SAA716M7 |
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13.0 Instruction Set (Continued)
Example: Load Accumulator Immediate
LD A,#05
Reg/Data
Contents
Memory
Before
After
Accumulator
XX Hex
05 Hex
Immediate Short. This is a special case of an immediate
instruction. In the 鈥淟oad B immediate鈥� instruction, the 4-bit
immediate value in the instruction is loaded into the lower
nibble of the B register. The upper nibble of the B register is
reset to 0000 binary.
Example: Load B Register Immediate Short
LD B,#7
Reg/Data
Contents
Memory
Before
After
B Pointer
12 Hex
07 Hex
Indirect from Program Memory. This is a special case of
an indirect instruction that allows access to data tables
stored in program memory. In the 鈥淟oad Accumulator Indi-
rect鈥� (LAID) instruction, the upper and lower bytes of the
Program Counter (PCU and PCL) are used temporarily as a
pointer to program memory. For purposes of accessing pro-
gram memory, the contents of the Accumulator and PCL are
exchanged. The data pointed to by the Program Counter is
loaded into the Accumulator, and simultaneously, the original
contents of PCL are restored so that the program can re-
sume normal execution.
Example: Load Accumulator Indirect
LAID
Reg/Data
Contents
Memory
Before
After
PCU
04 Hex
PCL
35 Hex
36 Hex
Accumulator
1F Hex
25 Hex
Memory Location
25 Hex
041F Hex
13.3.2 Tranfer-of-Control Addressing Modes
Program instructions are usually executed in sequential or-
der. However, Jump instructions can be used to change the
normal execution sequence. Several transfer-of-control ad-
dressing modes are available to specify jump addresses.
A change in program flow requires a non-incremental
change in the Program Counter contents. The Program
Counter consists of two bytes, designated the upper byte
(PCU) and lower byte (PCL). The most significant bit of PCU
is not used, leaving 15 bits to address the program memory.
Different addressing modes are used to specify the new
address for the Program Counter. The choice of addressing
mode depends primarily on the distance of the jump. Farther
jumps sometimes require more instruction bytes in order to
completely specify the new Program Counter contents.
The available transfer-of-control addressing modes are:
Jump Relative
Jump Absolute
Jump Absolute Long
Jump Indirect
The transfer-of-control addressing modes are described be-
low. Each description includes an example of a Jump in-
struction using a particular addressing mode, and the effect
on the Program Counter bytes of executing that instruction.
Jump Relative. In this 1-byte instruction, six bits of the
instruction opcode specify the distance of the jump from the
current program memory location. The distance of the jump
can range from 31 to +32. A JP+1 instruction is not allowed.
The programmer should use a NOP instead.
Example: Jump Relative
JP 0A
Reg
Contents
Before
After
PCU
02 Hex
PCL
05 Hex
0F Hex
Jump Absolute. In this 2-byte instruction, 12 bits of the
instruction opcode specify the new contents of the Program
Counter. The upper three bits of the Program Counter re-
main unchanged, restricting the new Program Counter ad-
dress to the same 4 kbyte address space as the current
instruction.
(This restriction is relevant only in devices using more than
one 4 kbyte program memory space.)
Example: Jump Absolute
JMP 0125
Reg
Contents
Before
After
PCU
0C Hex
01 Hex
PCL
77 Hex
25 Hex
Jump Absolute Long. In this 3-byte instruction, 15 bits of
the instruction opcode specify the new contents of the Pro-
gram Counter.
Example: Jump Absolute Long
JMP 03625
Reg/
Contents
Memory
Before
After
PCU
42 Hex
36 Hex
PCL
36 Hex
25 Hex
COP8SA
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鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VE-B4V-IY-F2 | CONVERTER MOD DC/DC 5.8V 50W |
| VE-B40-IY-F3 | CONVERTER MOD DC/DC 5V 50W |
| VI-J4F-IX | CONVERTER MOD DC/DC 72V 75W |
| VE-B40-IY-F1 | CONVERTER MOD DC/DC 5V 50W |
| VI-J4B-IX | CONVERTER MOD DC/DC 95V 75W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| COP8SAA716M8 | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| COP8SAA716M8 NOPB | 鍒堕€犲晢:National Semiconductor 鍔熻兘鎻忚堪:MCU 8-bit COP8 CISC 1KB EPROM 3.3V/5V 16-Pin SOIC W Rail 鍒堕€犲晢:National Semiconductor 鍔熻兘鎻忚堪:MCU 8-bit COP8 CISC 1KB EPROM 3.3V/5V 16-Pin SOIC Rail |
| COP8SAA716M8/63SN | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| COP8SAA716M8/NOPB | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| COP8SAA716M9 | 鍔熻兘鎻忚堪:IC MCU OTP 8BIT 1K 16SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:COP8™ 8SA 鍏跺畠鏈夐棞(gu膩n)鏂囦欢:STM32F101T8 View All Specifications 鐗硅壊鐢�(ch菐n)鍝�:STM32 32-bit Cortex MCUs 妯�(bi膩o)婧�(zh菙n)鍖呰:490 绯诲垪:STM32 F1 鏍稿績铏曠悊鍣�:ARM? Cortex?-M3 鑺珨灏哄:32-浣� 閫熷害:36MHz 閫ｉ€氭€�:I²C锛孖rDA锛孡IN锛孲PI锛孶ART/USART 澶栧湇瑷�(sh猫)鍌�:DMA锛孭DR锛孭OR锛孭VD锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):26 绋嬪簭瀛樺劜鍣ㄥ閲�:64KB锛�64K x 8锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:10K x 8 闆诲 - 闆绘簮 (Vcc/Vdd):2 V ~ 3.6 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:A/D 10x12b 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:36-VFQFN锛�36-VFQFPN 鍖呰:鎵樼洡 閰嶇敤:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2鏇村... 鍏跺畠鍚嶇ū:497-9032STM32F101T8U6-ND |
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