7.0 Timers (Continued) 7.3 TIMER CONTROL FLAGS The control bits and their functions are summarized below" />
參數(shù)資料
型號: COP8SAC720M9
廠商: National Semiconductor
文件頁數(shù): 17/62頁
文件大?。?/td> 0K
描述: IC MCU OTP 8BIT 4K 20-SOIC
標準包裝: 36
系列: COP8™ 8SA
核心處理器: COP8
芯體尺寸: 8-位
速度: 10MHz
連通性: Microwire/Plus(SPI)
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
其它名稱: *COP8SAC720M9
COP8SAC720M9B
COP8SAC720MB
7.0 Timers (Continued)
7.3 TIMER CONTROL FLAGS
The control bits and their functions are summarized below.
T1C3
Timer mode control
T1C2
Timer mode control
T1C1
Timer mode control
T1C0
Timer Start/Stop control in Modes 1 and 2 (Pro-
cessor Independent PWM and External Event
Counter), where 1 = Start, 0 = Stop
Timer Underflow Interrupt Pending Flag in
Mode 3 (Input Capture)
T1PNDA Timer Interrupt Pending Flag
T1ENA
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
T1PNDB Timer Interrupt Pending Flag
T1ENB
Timer Interrupt Enable Flag
1 = Timer Interrupt Enabled
0 = Timer Interrupt Disabled
The timer mode control bits (T1C3, T1C2 and T1C1) are detailed below:
Mode
T1C3
T1C2
T1C1
Description
Interrupt A
Source
Interrupt B
Source
Timer
Counts On
1
0
1
PWM: T1A Toggle
Autoreload RA
Autoreload RB
t
C
1
0
PWM: No T1A
Toggle
Autoreload RA
Autoreload RB
t
C
2
0
External Event
Counter
Timer
Underflow
Pos. T1B Edge
Pos. T1A
Edge
0
1
External Event
Counter
Timer
Underflow
Pos. T1B Edge
Pos. T1A
Edge
3
0
1
0
Captures:
Pos. T1A Edge
Pos. T1B Edge
t
C
T1A Pos. Edge
or Timer
T1B Pos. Edge
Underflow
1
0
Captures:
Pos. T1A
Neg. T1B
t
C
T1A Pos. Edge
Edge or Timer
Edge
T1B Neg. Edge
Underflow
0
1
Captures:
Neg. T1A
Neg. T1B
t
C
T1A Neg. Edge
Edge or Timer
Edge
T1B Neg. Edge
Underflow
1
Captures:
Neg. T1A
Neg. T1B
t
C
T1A Neg. Edge
Edge or Timer
Edge
T1B Neg. Edge
Underflow
COP8SA
Family
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