V
參數(shù)資料
型號(hào): CP2103EK
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 19/20頁(yè)
文件大?。?/td> 0K
描述: KIT EVAL FOR CP2103 USB TO UART
產(chǎn)品培訓(xùn)模塊: USB Protocol Products USBXpress
CP21xx USB Bridge
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,USB 2.0 至 UART(RS232)電橋
嵌入式:
已用 IC / 零件: CP2103
主要屬性: 全速,300 bps 至 1 Mbps
次要屬性: 軟件、連接器可直接訪問(wèn) UART 信號(hào)
已供物品: 板,線纜,CD
產(chǎn)品目錄頁(yè)面: 627 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: CP2103-GMR-ND - IC CTRLR BRIDGE USB-UART 28MLP
336-1164-ND - IC CTRLR BRIDGE USB-UART 28QFN
其它名稱: 336-1163
CP2103
8
Rev. 1.0
3. Pinout and Package Definitions
Table 7. CP2103 Pin Definitions
Name
Pin #
Type
Description
VDD
6
Power In
Power Out
3.0–3.6 V Power Supply Voltage Input.
3.3 V Voltage Regulator Output. See "9. Voltage Regulator" on page
VIO
5
Power In
1.8 V to VDD I/O Supply Voltage Input.
GND
2
Ground. Must be tied to ground.
SGND
Ground. Must be tied to ground.
RST
9
D I/O
Device Reset. Open-drain output of internal POR or VDD monitor. An
external source can initiate a system reset by driving this pin low for
at least 15 s.
REGIN
7
Power In
5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS
8
D In
VBUS Sense Input. This pin should be connected to the VBUS signal
of a USB network. A 5 V signal on this pin indicates a USB network
connection.
D+
3
D I/O
USB D+
D–
4
D I/O
USB D–
TXD
25
D Out
Asynchronous data output (UART Transmit)
RXD
24
D In
Asynchronous data input (UART Receive)
CTS
22*
D In
Clear To Send control input (active low)
RTS
23*
D Out
Ready to Send control output (active low)
DSR
26*
D in
Data Set Ready control input (active low)
DTR
27*
D Out
Data Terminal Ready control output (active low)
DCD
28*
D In
Data Carrier Detect control input (active low)
RI
1*
D In
Ring Indicator control input (active low)
SUSPEND
12*
D Out
This pin is driven high when the CP2103 enters the USB suspend
state.
SUSPEND
11*
D Out
This pin is driven low when the CP2103 enters the USB suspend
state.
NC
10, 13–15,
20–21
These pins should be left unconnected or tied to VDD.
GPIO.3
16
D I/O
User-configurable input or output.
GPIO.2
17
D I/O
User-configurable input or output.
GPIO.1
18
D I/O
User-configurable input or output.
GPIO.0
19
D I/O
User-configurable input or output.
*Note: Pins can be left unconnected when not used.
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