參數(shù)資料
型號: CP2104EK
廠商: Silicon Laboratories Inc
文件頁數(shù): 3/22頁
文件大?。?/td> 0K
描述: KIT EVAL FOR CP2104
產(chǎn)品培訓(xùn)模塊: CP21xx USB Bridge
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,USB 2.0 至 UART(RS485)電橋
嵌入式:
已用 IC / 零件: CP2104
主要屬性: 全速(12Mbps)
次要屬性: LED 狀態(tài)指示器
已供物品: 板,線纜,CD
相關(guān)產(chǎn)品: 336-2008-5-ND - IC SGL USB-TO-UART BRIDGE 24QFN
其它名稱: 336-2007
CP2104
Rev. 1.1
11
Figure 4. QFN-24 Recommended PCB Land Pattern
Table 9. QFN-24 PCB Land Pattern Dimensions
Dimension
Min
Max
Dimension
Min
Max
C1
3.90
4.00
X2
2.70
2.80
C2
3.90
4.00
Y1
0.65
0.75
E
0.50 BSC
Y2
2.70
2.80
X1
0.20
0.30
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60
m minimum, all the way around the pad.
Stencil Design
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A 2x2 array of 1.10 mm x 1.10 mm openings on a 1.30 mm pitch should be used for the center
pad.
Card Assembly
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
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