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參數(shù)資料
| 型號： | CP82C84AZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK GEN 5V 25MHZ 18-DIP |
| 標準包裝： | 400 |
| 類型： | 時鐘發(fā)生器，時鐘同步器，扇出配送 |
| PLL： | 無 |
| 輸入： | TTL |
| 輸出： | TTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 25MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 18-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 18-PDIP |
| 包裝： | 管件 |
1
82C84A
CMOS Clock Generator Driver
The Intersil 82C84A is a high performance CMOS Clock
Generator-driver which is designed to service the requirements
of both CMOS and NMOS microprocessors such as the
80C86, 80C88, 8086 and the 8088. The chip contains a crystal
controlled oscillator, a divide-by-three counter and complete
“Ready” synchronization and reset logic.
Static CMOS circuit design permits operation with an external
frequency source from DC to 25MHz. Crystal controlled
operation to 25MHz is guaranteed with the use of a parallel,
fundamental mode crystal and two small load capacitors.
All inputs (except X1 and RES) are TTL compatible over
temperature and voltage ranges.
Power consumption is a fraction of that of the equivalent
bipolar circuits. This speed-power characteristic of CMOS
permits the designer to custom tailor his system design with
respect to power and/or speed requirements.
Features
Generates the System Clock For CMOS or NMOS
Microprocessors
Up to 25MHz Operation
Uses a Parallel Mode Crystal Circuit or External
Frequency Source
Provides Ready Synchronization
Generates System Reset Output From Schmitt Trigger
Input
TTL Compatible Inputs/Outputs
Very Low Power Consumption
Single 5V Power Supply
Operating Temperature Ranges
- C82C84A . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
- I82C84A . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
- M82C84A . . . . . . . . . . . . . . . . . . . . . . .-55°C to +125°C
Pb-Free Plus Anneal Available (RoHS Compliant)
Pinouts
82C84A (PDIP, CERDIP)
TOP VIEW
82C84A (PLCC, CLCC)
TOP VIEW
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
CP82C84A
0 to +70
18 Ld PDIP
E18.3
CP82C84AZ
(See Note)
CP82C84AZ
0 to +70
18 Ld PDIP*
(Pb-free)
E18.3
IP82C84A
-40 to +85 18 Ld PDIP
E18.3
CS82C84A
0 to +70
20 Ld PLCC
N20.35
CS82C84AZ
(Note)
CS82C84AZ
0 to +70
20 Ld PLCC
(Pb-free)
N20.35
CS82C84AZ96
(Note)
CS82C84AZ
0 to +70
20 Ld PLCC
Tape and Reel
(Pb-free)
N20.35
IS82C84A
-40 to +85 20 Ld PLCC
N20.35
CD82C84A
0 to +70
18 Ld CERDIP F18.3
ID82C84A
-40 to +85 18 Ld CERDIP F18.3
MD82C84A/B
MD82C84A/B -55 to +125 18 Ld CERDIP F18.3
8406801VA
-55 to +125 18 Ld CERDIP
SMD#
F18.3
MR82C84A/B
MR82C84A/B -55 to +125 20 Pad CLCC J20.A
84068012A
-55 to +125 20 Pad CLCC
SMD#
J20.A
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
10
11
12
13
14
15
16
17
18
9
8
7
6
5
4
3
2
1
VCC
X2
EFI
F/C
OSC
RES
X1
GND
ASYNC
RESET
CSYNC
PCLK
RDY1
READY
RDY2
CLK
AEN1
AEN2
4
5
6
7
8
910
11
12
13
3
2
1
20
19
15
14
18
17
16
RDY1
AEN2
NC
READY
RDY2
NC
F/C
EFI
X2
CL
K
RESE
T
GN
D
OSC
RES
V
CC
CSYNC
PCLK
X1
AEN1
ASYNC
Data Sheet
FN2974.3
December 6, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1997, 2002, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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