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參數(shù)資料
| 型號(hào)： | CPD200-4530 |
| 元件分類(lèi)： | DC/DC變換器 |
| 英文描述： | 200 ? 250 Watt CompactPCI?DC-DC Converters |
| 中文描述： | 200？ 250瓦的CompactPCI？的DC - DC轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 7/13頁(yè) |
| 文件大?。?/td> | 259K |
| 代理商： | CPD200-4530 |
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NOV 28, 2006 revised to JAN 29, 2007
Page 7 of 13
www.power-one.com
CPD Series Data Sheet
200 – 250 Watt CompactPCI
DC-DC Converters
Power Fail Signal
The power fail circuitry monitors the input voltage and all
output voltages. Its output signal
V
fail
changes from high to
low impedance, when one of the monitored voltages falls
below the threshold level;
V
fail
changes back to high
impedance, when the monitored voltage exceeds the
threshold level again.
The threshold levels correspond to approx. 90% of
V
i min
and approx. 85% of
V
o nom
.
Connector pin 42 (fail signal
V
fail
) is internally connected
via the drain-source path of a JFET (self-conducting type)
to the signal return pin 22. The current
I
fail
should not
exceed 2.5 mA. The JFET is not protected against
overvoltage;
V
fail
should not exceed 40 V.
Fig. 8
Power Fail: JFET output, I
fail
≤
2.5 mA.
Temperature Warning and Shut-Down
The temperature warning circuitry monitors the case
temperature. Its output signal changes from high to low
impedance, when the case temperature exceeds the
upper threshold level, and changes back to high
impedance, when the case temperature falls below the
lower threshold level.
Pin 38 (degrade signal
V
DEG#
) is internally connected via
the collector-emitter path of an NPN transistor to the
signal return pin 22. The current
I
DEG#
through should not
exceed 40 mA. To prevent the NPN transistor from
damage,
V
DEG#
should not exceed 40 V.
If the case temperature
T
C
exceeds 105 °C, the converter
will be disabled. It resumes operation, once
T
C
falls below
105 °C.
Fig. 6
Degrade signal: NPN output V
DEG#
≤
40 V, I
DEG#
≤
20 mA
Table 6: Degrade threshold level
Case Temperature
typ
min
max
Threshold level
80 °C
85 °C
90 °C
Fig. 7
Degrade signal V
DEG#
versus case temperature T
C
Vo+
RTN
FAL#
V
fail
I
fail
R
p
I
11006a
42
46
47
22
Vo+
RTN
DEG#
V
DEG#
I
DEG#
R
p
I
11056a
38
46
47
22
05189a
0
2
4
6
8
10
60
70
80
90
100
110 °C
V
DEG#
[V]
degrade signal
0
0.2
0.4
0.6
0.8
1
P
o
/
P
o max
thermal shut-down
Table 7: Sense line data
Output
[V]
Total voltage difference between sense lines
and their respective outputs
3.3
0.8 V
5
1 V
12
1 V
Sense Lines
(Only for Vo1, Vo2 and Vo3.)
This feature allows the compensation of voltage drops
across the connector contacts and if necessary, across
the load lines.
To ensure correct operation, each sense line (S+ and S–)
should be connected to its respective power output (Vo+
and Vo–).
Note:
All outputs have a common sense return.
The voltage difference between any sense line at its re-
spective power output pin (as measured on the connector)
should not exceed the following values.
Note
: The output terminals Vo+ and Vo– must always be
connected to the load before connecting the sense lines S+
and S–, otherwise the converter will be damaged.
Note
: If the sense lines S+ and S– compensate for a
considerable voltage drop, the output loads shall be
reduced in order to respect the maximum output power.
Enable
Connect enable pin 27 (EN#) with signal return pin 22
(RTN) externally to start the converter. Pin 27 is shorter
than the others ensuring startup only when all other pins
are already connected to the system providing a true hot-
swap capability.
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