參數(shù)資料
型號(hào): CS2320-9EPD6TB2
元件分類: 電源模塊
英文描述: 2-OUTPUT 100 W DC-DC REG PWR SUPPLY MODULE
封裝: METAL, CASE S02, MODULE
文件頁(yè)數(shù): 21/31頁(yè)
文件大小: 633K
代理商: CS2320-9EPD6TB2
Cassette Style
100 Watt DC-DC Converters
S Series
Edition 1/01.2000
28/31
0
1
0.95
0
U
i [V DC]
0
t
low min
4
t
low min
4
t
high min
t
h
1
U
ti +Uhi
U
ti
Input voltage failure
Switch-on cycle
Input voltage sag
Switch-on cycle and subsequent
input voltage failure
U
D high
U
D low
U
D
0
JFET
NPN
t
U
o1
U
o1 nom
U
D high
U
D low
U
D
t
low min
4
t
h
1
0
U
D high
U
D low
U
D
0
JFET
NPN
U
o1
U
D high
U
D low
U
D
t
low min
4
U
to
3
Output voltage failure
0
I
D high
I
D low
I
D
t
0
I
D high
I
D low
I
D
t
3
2
33
U
o1 nom
U
to +Uho
Input voltage monitoring
Output voltage monitoring
11008
D-signal with respect to input and output voltage versus time:
1 Hold-up time see section Electrical Input Data
2 With output voltage monitoring, hold-up time th = 0.
3 The signal will remain high if the D output is connected to
an external source.
4 tlow min = 100...170 ms, typically 130 ms.
Fig. 33
Relationship between Ui, Uo1, UD, Uo1/Uo nom versus time
Table 18: D-output logic signals
Version of D
Ui < Ut resp. Uo < Ut
Ui > Ut + Uh resp. Uo > Ut
Configuration
D1, D2, D3, D4, D0
low
high
JFET
D5, D6, D7, D8, D9, DD
high
low
NPN
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