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參數(shù)資料
| 型號： | CS2320-9PD7B2 |
| 元件分類： | 電源模塊 |
| 英文描述： | 2-OUTPUT 100 W DC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE S02, MODULE |
| 文件頁數(shù)： | 26/31頁 |
| 文件大?。?/td> | 633K |
| 代理商： | CS2320-9PD7B2 |
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Cassette Style
100 Watt DC-DC Converters
S Series
Edition 1/01.2000
4/31
Functional Description
The input voltage is fed via an input fuse, an input filter and
an inrush current limiter to the input capacitor. This capaci-
tor sources a single transistor forward converter. Each out-
put is powered by a separate secondary winding of the
main transformer. The resultant voltages are rectified and
their ripples smoothed by a power choke and output filter.
The control logic senses the main output voltage
Uo1 and
Fig. 1
Block diagram of single output converters AS…ES 1000
generates, with respect to the maximum admissible output
currents, the control signal for the primary switching tran-
sistor.
The second output of double output units is controlled by
the main output but has independent current limiting. If the
main output is driven into current limitation, the second out-
put voltage will fall as well and vice versa.
1 Transient suppressor (VDR) in CS, DS, ES, FS types
2 Transient suppressor (diode) in AS, BS, CS, FS types
3 Inrush current limiter in CS, DS, ES, FS types (NTC or Opt. E), -9 versions exclude the NTC
4 Input fuse
Input
filter
Control
circuit
1
2
P
3
Forward
converter
(approx.
110
kHz)
16
18
20
22
12
14
4
6
8
10
Output
2
filter
Output
1
filter
26
28
30
32
24
4
–
+
Y
R
i
D
T
Vi+
Vi–
03058
Vo1+
Vo1–
Vo2+
Vo2–
Fig. 2
Block diagram of symmetrical double output converters AS...ES 2000
Input
filter
Control
circuit
2
P
3
Forward
converter
(approx.
120
kHz)
Y
16
18
20
22
12
4
6
8
10
14
Y
Output
filter
1
26
28
30
32
24
4
–
+
Y
Vi+
Vi–
R
i
D/V
T
03057
S+
Vo+
Vo–
S–
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