參數(shù)資料
型號(hào)： CS35L00-CNZ
廠商： CIRRUS LOGIC INC
元件分類(lèi)： 音頻／視頻放大
中文描述： 2.7 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO10
封裝： 3 X 3 MM, LEAD FREE, MO-220, DFN-10
文件頁(yè)數(shù)： 5/34頁(yè)
文件大?。?/td> 730K
代理商： CS35L00-CNZ
CS35L00
DS906PP1
13
ELECTRICAL CHARACTERISTICS - FHD MODE
Note:
13. SNRA dB is referenced to the output signal amplitude resulting in the specified output power at
THD+N <1%. See “Parameter Definitions” on page 29 for more information.
14. Idle Current Draw (IIDLE) is specified without any output filtering. Refer to Section 5.3 on page 17 for
information on output filtering. At idle, the output devices will switch at the same rate in HD and FHD
mode. FHD only changes the output switching frequency when the input levels are above the “Input
Level for Entering VBATT Operation in HD/FHD Modes (VIN-VBATT) given in “Electrical Characteristics
Parameters
Symbol
Test Conditions
Min
Typ
Max Units
Output Power
(Continuous Average)
PO
THD+N = 1%
RL = 8 Ω (VBATT = 5.0/4.2/3.7 VDC)
RL = 4 Ω (VBATT = 5.0/4.2/3.7 VDC)
-
1.28/0.89/0.68
2.17/1.51/1.15
-
W
THD+N = 10%
RL = 8 Ω (VBATT = 5.0/4.2/3.7 VDC)
RL = 4 Ω (VBATT = 5.0/4.2/3.7 VDC)
-
1.65/1.16/0.90
2.76/1.95/1.51
-
W
Total Harmonic Distortion + Noise THD+N PO = 1.0 W
-
0.10
-
%
Power Supply Rejection Ratio
PSRR
Vripple = 200 mVPP, AINx AC coupled to GND
@ 217 Hz
@ 1 kHz
-
89
85
-
dB
Common-Mode Rejection Ratio
CMRR Vripple =1VPP, fripple = 217 Hz
-71
-
dB
Signal to Noise Ratio
A-Weighted
SNRA
Inputs AC Coupled to Ground,
Referenced to 1% THD+N
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
93
94
-
dB
Idle Channel Noise
A-Weighted
ICNA
AIN+ connected to AIN-
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
71
63
-
μVrms
Idle Channel Noise
ICN
AIN+ connected to AIN-
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
125
115
-
μVrms
Frequency Response
FR
20 Hz to 20 kHz
-4.0
0
0.5
dB
Total Group Delay
GD
-
14
-
μs
Output Switching Frequency
fsw1
Input level below VIN-LDO
-192
-
kHz
Output Switching Frequency
fsw2
Input level above VIN-VBATT
-
76
-
kHz
Idle Current Draw
IIDLE
AIN+ connected AIN-, No Output Load
VBATT = 5 VDC
VBATT = 4.2 VDC
VBATT = 3.7 VDC
-
1.11
1.06
1.03
-
mA
Input Impedance, Single Ended
ZIN
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
160
250
-
k
Ω
k
Ω
Input Voltage @ 1 % THD+N
VICLIP
RL = 8 Ω (VBATT = 5.0/4.2/3.7 VDC)
GAIN_SEL = Low (12 dB)
GAIN_SEL = High (6 dB)
-
0.83/0.69/0.61
1.65/1.38/1.20
-
Vrms
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