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參數(shù)資料
| 型號(hào)： | CS51312GD16 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Synchronous CPU Buck Controller for 12V Only Applications |
| 中文描述： | 同步降壓控制器的CPU，只有應(yīng)用的12V |
| 文件頁數(shù)： | 12/18頁 |
| 文件大小： | 276K |
| 代理商： | CS51312GD16 |
C
12
Application Information: continued
where
I
L
= inductor ripple current;
V
OUT
= output voltage;
T
OFF
= switch Off-Time;
L = inductor value.
The designer can now verify if the number of output
capacitors from step 2 will provide an acceptable output
voltage ripple (1% of output voltage is common). The for-
mula below is used:
I
L
=
,
Rearranging we have:
ESR
MAX
=
,
where
ESR
MAX
= maximum allowable ESR;
V
OUT
= 1%
×
V
OUT
= maximum allowable output volt-
age ripple ( budgeted by the designer );
I
L
= inductor ripple current;
V
OUT
= output voltage.
The number of output capacitors is determined by:
Number of capacitors =
,
where ESR
CAP
= maximum ESR per capacitor (specified in
manufacturer’s data sheet).
The designer must also verify that the inductor value
yields reasonable inductor peak and valley currents (the
inductor current is a triangular waveform):
I
L(PEAK)
= I
OUT
+
,
where
I
L(PEAK)
= inductor peak current;
I
OUT
= load current;
I
L
= inductor ripple current.
I
L(VALLEY)
= I
OUT
,
where I
L(VALLEY)
= inductor valley current.
Step 5: Selection of the Input Capacitors
These components must be selected and placed carefully to
yield optimal results. Capacitors should be chosen to pro-
vide acceptable ripple on the input supply lines. A key
specification for input capacitors is their ripple current rat-
ing. The input capacitor should also be able to handle the
input RMS current I
IN(RMS)
.
The combination of the input capacitors C
IN
discharges
during the on-time.
The input capacitor discharge current is given by:
I
CINDIS(RMS)
=
,
where
I
CINDIS(RMS)
= input capacitor discharge current;
I
L(PEAK)
= inductor peak current;
I
L(VALLEY)
= inductor valley current.
C
IN
charges during the off-time, the average current
through the capacitor over one switching cycle is zero:
I
CIN(CH)
= I
CIN(DIS)
×
,
where
I
CIN(CH)
= input capacitor charge current;
I
CIN(DIS)
= input capacitor discharge current;
D = Duty Cycle.
The total Input RMS current is:
I
CIN(RMS)
= (I
CIN(DIS)2
×
D) + (I
CIN(CH)2
×
(1
D))
The number of input capacitors required is then deter-
mined by:
N
CIN
=
,
where
N
CIN
= number of input capacitors;
I
CIN(RMS)
= total input RMS current;
I
RIPPLE
= input capacitor ripple current rating (specified
in manufacturer’s data sheets).
The total input capacitor ESR needs to be determined in
order to calculate the power dissipation of the input capac-
itors:
ESR
CIN
=
,
where
ESR
CIN
= total input capacitor ESR;
ESR
CAP
= maximum ESR per capacitor (specified in
manufacturer’s data sheets);
N
CIN
= number of input capacitors.
Once the total ESR of the input capacitors is known, the
input capacitor ripple voltage can be determined using the
formula:
V
CIN(RMS)
= I
CIN(RMS)
×
ESR
CIN
,
where
V
CIN(RMS)
= input capacitor RMS voltage;
I
CIN(RMS)
= total input RMS current;
ESR
CIN
= total input capacitor ESR.
The designer must determine the input capacitor power
loss in order to ensure there isn’t excessive power dissipa-
tion through these components. The following formula is
used:
P
CIN(RMS)
= I
CIN(RMS)2
×
ESR
CIN
ESR
CAP
N
CIN
I
CIN(RMS)
I
RIPPLE
D
1
D
(I
L(PEAK)2
+ (I
L(PEAK)
×
I
L(VALLEY)
) + I
L(VALLEY)2
×
D
3
I
L
2
I
L
2
ESR
CAP
ESR
MAX
V
OUT
I
L
V
OUT
ESR
MAX
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