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參數(shù)資料
| 型號(hào)： | CS5651GN16 |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.4 A DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 162K |
| 代理商： | CS5651GN16 |
7
ter capacitor. Ceramic bypass capacitors (0.1F) connected
directly to VCC and VREF may be required to improve noise
filtering. This provides a low impedance path for filtering
the high frequency noise. All high current loops should be
kept as short as possible using heavy copper runs. The
error amp compensation circuitry and the converter out-
put voltage-divider should be located close to the IC and
as far as possible from the power switch and other noise
generating components.
Operating Description: continued
CS5651
SYNC
Capacitor CT
Latch 1
“Set” Input
COMP1
Sense1
VOUT1
Latch 1
“Reset” Input
ENABLE2
Latch 2
“Set” Input
COMP2
Sense2
Latch 2
“Reset” Input
VOUT2
0V
Timing Diagram
+
-
+
-
+
-
+
-
+
-
+
-
RT
CT
VFB
1
Reference
Regulator
VREF
UVLO
3.4V
14V
2.5V
R
20k
VREF
Sync
1.0VREF
2R
1.0V
250A
R
1.0mA
2R
Error
Amp 2
COMP1
ENABLE2
VFB
2
COMP2
Gnd
Pwr Gnd
R
1.0V
Current Sense
Comparator 2
Current Sense
Comparator 1
R
S
Q
R
S
R
PWM
Latch 2
PWM
Latch 1
VCC
VIN
VOUT
1
VOUT
2
Sense1
Q1
Q2
RSense1
Sense2
RSense2
-
+
-
Error
Amp 1
VOUT
1
VOUT
2
COUT
2
COUT
1
5.0V
Q
Oscillator
Internal
Bias
CF1 +
L1
D1
L2
D2
+
CF2
RFB
1
RFB
2
RFB
3
RFB
4
VOUT
2
VOUT
1
Dual Boost Regulator
VCC
UVLO
+
Typical Application Diagram
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