參數(shù)資料
型號(hào): CS600/L2
廠商: ISOCOM LTD
元件分類: 光電耦合器
英文描述: 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER
封裝: HERMETIC SEALED, CERAMIC PACKAGE-6
文件頁(yè)數(shù): 2/12頁(yè)
文件大?。?/td> 561K
代理商: CS600/L2
For sales enquiries, or further information, please contact our sales office at:
Isocom Ltd, Hutton Close, Crowther Industrial Estate, District 3, Washington, NE38 0AH
Tel: +44 0191 4166 546 Fax: +44 0191 4155 055
2007 Copyright reserved to Isocom Limited
QC 88000-C004: 2007
Page 10 of 12
ISOCOMLTD
Typical Characteristics
TA = 25°C, VCC = 5V each channel where appropriate
Parameter
Symbol
Test Conditions
Note
s
Min
Type
Max
Units
Input Diode Temperature
Coefficient
VF
TA
IF = 20mA
1
-
-1.9
-
mV/°C
Resistance
RI-O
V10 = 500V
3
-
10
12
-
Capacitance
CI-O
f = 1MHz
3
-
1.9
-
pF
Input Capacitance
CIN
f = 1MHz, VF = 0
1
-
60
-
pF
Input-Input Leakage
Current
II-I
45% Relative Humidity
VII = 500Vdc, t = 5S
4
-
0.5
-
nA
Resistance
RI-I
VII = 500Vdc
4
-
10
12
-
Capacitance
CI-I
f = 1MHz
4
-
0.6
-
pF
Output Rise (10-90%)
tr
RL = 510, CL = 15pF, IF = 13mA
1
-
35
-
nS
Output Fall Time (90-
10%)
tf
RL = 510, CL = 15pF, IF = 13mA
1
-
35
-
nS
Common Mode Transient
Immunity at Logic High
Output Level
CMH
VO (min) = 2V, VCM = 10V (peak)
RL = 510, IF = 0mA
1 & 7
-
1000
-
V/S
Common Mode Transient
Immunity at Logic Low
Output Level
CML
VO(max) = 0.8V, VCM = 10V (peak)
RL = 510, IF = 10mA
1 & 8
-
-1000
-
V/S
Notes: (Apply typically to 16 pin package)
1. Each channel, where appropriate.
2. Measured between pins 1 through 4 shorted together, and pins 9 through 16 shorted together.
3. Measured between pins 1 and 2, or 5 and 6 shorted together, and pins 9 through 16 shorted together.
4. Measured between pins 1 and 2 shorted together, and pins 5 and 6 shorted together.
5. The tPLH propagation delay is measured from the 6.5mA point on the trailing edge of the input pulse to the 1.5V point
on the trailing edge of the output pulse.
6. The tPHL propagation delay is measured from the 6.5mA point on the leading edge of the input pulse to the 1.5V point
on the leading edge of the output pulse.
7. CMH is the maximum tolerable common mode transient to assure that the output will remain in a high logic state (i.e.,
VO > 2.0V).
8. CML is the maximum tolerable common mode transient to assure that the output will remain in the logic low state
(i.e., VO < 2.0V).
9. It is essential that a bypass capacitor (0.1 to 0.1F, ceramic) be connected from pin 10 to pin 15. Total lead length
between both ends of the capacitor and the isolator pins should not exceed 20mm.
10. This is a momentary withstand test, not an operating condition.
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