Chapter 6 XGATE (S12XGATEV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
272
Freescale Semiconductor
Operation
n = RS or IMM4
Rotates the bits in register RD n positions to the right. The upper n bits of the register RD are lled with
the lower n bits. Two source forms are available. In the rst form, the parameter n is contained in the
instruction code as an immediate operand. In the second form, the parameter is contained in the lower bits
of the source register RS[3:0]. All other bits in RS are ignored. If n is zero no shift will take place and the
register RD will be unaffected; however, the condition code ags will be updated.
CCR Effects
Code and CPU Cycles
ROR
Rotate Right
ROR
NZ
V
C
0—
N:
Set if bit 15 of the result is set; cleared otherwise.
Z:
Set if the result is $0000; cleared otherwise.
V:
0; cleared.
C:
Not affected.
Source Form
Address
Mode
Machine Code
Cycles
ROR RD, #IMM4
IMM4
0
1
RD
IMM4
1
P
ROR RD, RS
DYA
0
1
RD
RS
1
0
1
P
RD
n bits