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參數(shù)資料
| 型號(hào)： | CSP1034C-T11-DB |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大小： | 44K |
| 代理商： | CSP1034C-T11-DB |
2
Agere Systems Inc.
DRAFT
Product Brief
February 2002
SV92P PCI Soft Modem Chip Set
Functional Description
The Agere Systems SV92P chip set is a two-chip solution consisting of a Agere Systems SV92P PCI interface
device and a CSP1035 silicon DAA or the CSP1034 line codec. It supports V.92, V.90, V.34 data, and FAX rates up
to 14.4 kbits/s.
The SV92P is an interface device with the memory required for receiving, transmitting, and buffering data sent
between the host system (soft modem stack) and the DAA or line codec. The SV92P has the following three
interfaces:
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PCI: SV92P uses the PCI interface to communicate with the host system or soft modem stack. This interface has
two bus mastering streams and 5 V tolerant buffers. With this interface, the SV92P can take control of the local
bus and exchange data directly with the host system RAM.
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Serial input/output (SIO): SV92P uses the SIO port to interface with the CSP1034C line codec. The CSP1034C
uses a transformer to interface the high-voltage analog portion of the circuit.
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Differential input/output: SV92P uses the DIO port to interface with the CSP1035A DAA. The CSP1035A has an
integrated line codec and is part of the line interface. The CSP1035A sits on the high voltage side of the modem
circuit. It interfaces with the SV92P via a digital isolation barrier connected to the DIO port (For more information
on the CSP1035A and the digital isolation barrier see the Line Powered DAA-CSP1035A Data Sheet.)
The DIO port is multiplexed with the SIO port.
Integrated SV92P with PCI
The SV92P incorporates a PCI interface which is compliant with PCI local bus specification revision 2.2. The inter-
face also supports two full-duplex bus master streams for greater access to host system resources. The interface
supports both 3.3 V and 5 V signaling systems. However, the device supply must come from a 3.3 V PCI supply,
Vaux, or a regulated 3.3 V supply.
I/O Voltage Considerations
The system supply voltage requirement is 3.3 V ± 0.3 Vdc. This device also employs 5 V tolerant PCI buffers. To
support this 5 V tolerant I/O, the VIO pin is provided as an indicator to the device of the signaling voltage being
used on the bus.
System Support and Requirements
The SV92P supports Windows98, Windows ME Windows2000, WindowsNT 4.0, and WindowsXP It is designed
to operate on any pentium class CPU which meets the following system requirements:
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Pentium
200 MHz with 32 Mbytes of RAM
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AMD
K6 200 MHz with 32 Mbytes of RAM
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CSP1035A-T11-DB | Telecommunication IC |
| CSP1037A | Telecomm/Datacomm |
| CSP1084J | Cell-Phone Circuit |
| CSP1084T100 | Cell-Phone Circuit |
| CSP1084T64 | Cell-Phone Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CSP1034S-T11-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:DP2 DATA PUMP CHIP SETS |
| CSP1035A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Host-Based Controller V.92 Modem Chip Set |
| CSP1035A-T11 | 制造商:AGERE 制造商全稱:AGERE 功能描述:One-Chip Modem for Embedded Applications |
| CSP1035A-T11-DB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| CSP1037A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
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