參數(shù)資料
型號(hào): CXA1391R
廠商: Sony Corporation
英文描述: Processing IC for Complementary Color Mosaic CCD Camera
中文描述: 處理集成電路互補(bǔ)彩色馬賽克CCD相機(jī)
文件頁(yè)數(shù): 21/33頁(yè)
文件大小: 735K
代理商: CXA1391R
– 21 –
CXA1391Q/R
Note 1)
For pins without specific instructions regarding input, feed the DC value shown on the Test Circuit.
Calculations are mentioned utilizing the pin name or the electrical characteristics symbols. Otherwise,
for exceptional notations explanatory notes, are given with every case.
Note 2)
In this item, the gain of DLC
1
amplifier exclusively is calculated. CG is the gain of the system from
DLC
1
IN to WB-R from which DLC
1
GC amplifier gain has been excluded.
—CG calculating method—
In the actual calculation, the system on C
0
side is utilized.
Input: S1IN = –62.5mV
S2IN = 62.5mV
Condition: Same as DLC
1
H
Calculations: CG = 20log (WB-R/DLC
0
OUT)
Note 3)
Chroma matrix operations
R = 2 [C
R
+
α
Y]
G = Y – (C
R
+ C
B
)
B = 2 [C
B
+ (Y – C)]
α
: Control with RMTX (Preset 0.167)
: Control with BMTX (Preset 0.22)
Note 4)
With the typical gain taken when R CONT is at 4V, compare with the gain during Max. and Min. The
same for B CONT.
Note 5)
Adjustment and testing is performed so that signals are output only for each of R, G, B channels
respectively.
Note 6)
Comparison with B–Y OUT when R–Y HUE = 0V (HUE OFF).
The same for B–Y HUE.
Note 7)
The compensation of difference in gain of Y
H
0 andY
H
1 is as follows.
1) At DLY
H
GAIN = 1.8V, DLY
H
amplifier gain is 3dB.
2) Test DLY
H
OUT (tested at YrT) when Y
H
IN = 220mV signal is input.
3) The difference in gain between Y
H
0 and Y
H
1 is compensated by inputting the signal as –3dB to
DLY
H
IN.
Note 8)
The amplifier input is varied and the gain confirmed.
Note 9)
VAP (Vertical Aperture Compensation)
Note 10)
Dark slice variable volume. (Output level difference between the value slice volume at Max. and slice
volume at Min.)
Note 11)
Utilizing V-APCN 2H mode, DLY
1
amplifier exclusive gain is obtained through operations. However,
as the amplifier gain cannot be tested directly, only the upper and lower limits of the gain control are
checked according to the following method.
(a) Lower limit check
S1 IN = S2 IN = 500mV (At that time KNEE circuit input turns to 200mV)
DLY
1
IN = –200mV (For others refer to the conditions chart)
In this condition, if we have VAP OUT
0, this indicates that DLY
1
amplifier is below 0dB.
(b) Upper limit check
S1 IN = S2 IN = 500mV
DLY
1
IN = –110mV (in (a) the –5dB of –200mV)
In this condition, if we have VAP OUT
0, this indicates that DLY
1
amplifier is above 5dB.
Note 12)
CS (Chroma Suppress)
相關(guān)PDF資料
PDF描述
CXA1392Q Encoder for CCD Color Camera(CCD彩色照相機(jī)編碼器)
CXA1392R Encoder for CCD Color Camera(CCD彩色照相機(jī)編碼器)
CXA1396D Dual Precision Operational Amplifier 8-SOIC 0 to 70
CXA1398M Dual Precision Operational Amplifier 8-SOIC 0 to 70
CXA1398P Dual Precision Operational Amplifier 8-SOIC 0 to 70
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXA1392Q 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit
CXA1392Q/R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Encoder for CCD Color Camera
CXA1392R 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Color Encoder Circuit
CXA1393AN/AM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video Camera Circuit
CXA1396D 制造商:SONY 制造商全稱:Sony Corporation 功能描述:8-bit 125 MSPS Flash A/D Converter