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參數(shù)資料
| 型號： | CXD2053AM |
| 廠商： | Sony Corporation |
| 英文描述： | Auto Wide, EDTV-II ID Detection, ID-1 Detection |
| 中文描述： | 汽車寬，增強清晰度電視，第二號檢測，編號- 1檢測 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 196K |
| 代理商： | CXD2053AM |
– 11 –
CXD2053AM/AS
6. Processing of EDTV-
II
ID and ID-1 data from the bus
EDTV-
II
ID
or ID-1
EDVLD or
VBVLD
Decoder
Data validity judgment
I
2
C
CXD2053AM/AS
Pin direct output
to microcomputer
As shown in the figure above, the data validity judgment and decoding results are obtained independently
during EDTV-
II
ID or ID-1 decoding. When outputting these results directly to pins, the results are output after
first taking their logical product (AND). These results are output independently to the I
2
C bus.
Therefore, processing inside the microcomputer which has acquired the information from the I
2
C is performed
either by simply outputting this data directly to the pins or by taking the logical product (AND) as above.
In addition, performing the processing when the data validity judgment result (EDVLD or VBVLD) is 1 and the
decoding result is 0 allows video to be judged as 4:3 video. Even video which has had the top and bottom of
the screen blacked out due to picture composition intentions can be viewed as the original 4:3 video by giving
this judgment priority over the auto wide function.
7. Setting EDTV-
II
ID decoding function
The performance of the EDTV-
II
ID decoding function can be switched directly by pin settings during either I
2
C
bus or bus-free mode.
Setting
I
2
C exists
I
2
C -free
Resistance to ghosting
Resistance to weak
electric fields
ED2FSC = 0
EDDEC2 bit3 = 0, bit2 = 1
SCL (15pin) = Low
SDA (16pin) = Low
Medium
Medium
ED2FSC = 0
EDDEC2 bit3 = 1, bit2 = 0
SCL (15pin) = High
SDA (16pin) = Low
Strong
Medium
ED2FSC = 1
EDDEC2 bit3 = 1, bit2 = 0
SCL (15pin) = High
SDA (15pin) = High
Strong
Strong
Table 5. EDTV-
II
ID decoding function switching
ED2FSC is originally a function which stops the 3.58MHz amplitude check for the Y signal input from the S
terminal, etc. However, it can also be used in combination with the EDDEC2 setting to increase the resistance
to ghosting and weak electric fields as shown in the table above. EDDEC2 is the luminance check level
switching during the 3.58MHz or 2.04MHz confirmation signal interval.
Similarly, although EDDEC1 is the 2.04MHz amplitude check level switching, it should be set to bit 5 = 0 and
bit 4 = 1.
Since EDTV-
II
ID identification for this IC is simple identification, increasing the resistance to weak electric
fields, etc. results in a tradeoff which increases the possibility of misoperation. Accordingly, the leftmost
settings in the table above should be used as the standard settings, and other settings used only when
necessary.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2053AS | Auto Wide, EDTV-II ID Detection, ID-1 Detection |
| CXD2064Q | Digital Comb Filter (NTSC/PAL) |
| CXD2085M | ID-1 Detection |
| CXD2093Q | Digital Comb Filter (NTSC) |
| CXD2107M | HI8 SYSTEM DETECTION IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2053AM/AS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Auto Wide.EDTV-II ID Detection.ID-1 Detection |
| CXD2053AS | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Auto Wide, EDTV-II ID Detection, ID-1 Detection |
| CXD2053S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TV/Video Detection Circuit |
| CXD2064Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Digital Comb Filter (NTSC/PAL) |
| CXD2073 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Digital Comb Filter (NTSC) |
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