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參數(shù)資料
| 型號： | CXD2303AQ |
| 廠商： | Sony Corporation |
| 英文描述： | 8-Bit 3-Channel 50MSPS Video A/D Converter With Clamp Function(8位、50MSPS、三通道視頻A/D轉(zhuǎn)換器（具有箝位功能）) |
| 中文描述： | 8位3通道50 MSPS的視頻A / D轉(zhuǎn)換器與鉗位功能（8位，50 MSPS的，三通道視頻的A / D轉(zhuǎn)換器（具有鉗位功能）） |
| 文件頁數(shù)： | 13/37頁 |
| 文件大?。?/td> | 496K |
| 代理商： | CXD2303AQ |
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CXD2303AQ
Description of Operation
1. Output Format
The CXD2303AQ can select six different types of output formats through a combination of the CTL0, CTL1
and CTL2 inputs as shown in the table below. Output is synchronized to the SY input signal transition from
Low to High.
Table 1. Setting values and output formats
Note that when the SY input is open or Low level, the output format is mode #0 (4 : 4 : 4).
However, when the SY input signal temporarily goes to Low level for the mode switching, the mode
changes as shown in Timing Chart
II
. When digital data is being output in the mode n output format, if the
SY input signal changes from High level to Low level, the digital data continues to be output in the mode n
output format for the following two clocks. The output format for the digital data output from the third to fifth
clocks is not established, so its use is prohibited. If the SY input signal remains Low level, the digital data
is output in the mode #0 output format from the sixth clock. After the SY input signal changes from Low
level to High level, the digital data is output in the mode m output format from the sixth clock. At this time,
the data output at the sixth clock is the data A/D converted from the analog input signal that was sampled
at the falling edge of the clock input signal immediately after the SY input signal changes from Low level to
High level.
The output format control input signals CTL2, CTL1 and CTL0 are fetched only in sync with the rising edge
of the clock input signal after the SY input signal has risen.
8
FFT
CXD2303AQ
AIN
BIN, CIN
CLK
An
Bn
Cn
AMP
sine wave
SG
SG
8
8
Cross talk measurement circuit
Note
: This diagram shows the case where the channel A is measured.
The same as for measuring the channels B and C.
Setting
CTL1
L
L
H
H
L
L
H
H
CTL2
L
L
L
L
H
H
H
H
CTL0
L
H
L
H
L
H
L
H
Output
Mode
Format
0
1
2
3
4
5
6
7
4 : 4 : 4
4 : 2 : 2 (8 fs)
4 : 2 : 2 (D2)
4 : 2 : 2 (Special)
4 : 1 : 1
4 : 1 : 1 (Special)
Simple boundary scan 1
Simple boundary scan 2
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| CXD2307R | 10-bit 50MSPS RGB 3-channel D/A Converter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2304 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:8-bit 20 MSPS RGB 3-Channel D/A Converter |
| CXD2304R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:8-bit 20 MSPS RGB 3-Channel D/A Converter |
| CXD2306 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:10-bit 80MSPS 1ch D/A Converter |
| CXD2306Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:10-bit 80MSPS 1ch D/A Converter |
| CXD2307 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:10-bit 50MSPS RGB 3-channel D/A Converter |
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