參數(shù)資料
型號(hào): CXD2312
廠商: Sony Corporation
英文描述: 9-bit 20MSPS Video A/D Converter
中文描述: 9位20MSPS視頻A / D轉(zhuǎn)換
文件頁數(shù): 12/16頁
文件大?。?/td> 305K
代理商: CXD2312
– 12 –
CXD2312R
(2) Auto Calibration Pulse Generation Function
After startup calibration is completed, this function periodically generates calibration pulses so that calibration
can be performed constantly without any need for input of calibration pulses from an external source. This
function counts 16 main clock cycles on a 24-bit counter and uses the carry-out as the calibration pulse. The
cycle of the calibration pulse generated in this fashion is as follows:
Internal calibration pulse generation cycle = main clock cycle
×
16
×
16,777,216
Therefore, if the main clock frequency is 14.3MHz, the calibration pulse cycle is approximately 19 seconds;
since calibration is performed once every seven pulses, the calibration cycle is approximately 130 seconds. In
order to use this function, the SEL pin (Pin 17) must be high.
Note that this function cannot be used if fixing the lower bits in the calibration operation as described below will
cause problems because this function is executed asynchronously without regard to the input signals.
(3) External Calibration Pulse Input Function
If the auto calibration function cannot be used, calibration can be performed in synchronization with the input
signals when a calibration pulse is input from the CAL pin (Pin 41) by setting the SEL pin (Pin 17) low.
7clock
1clock or more
CLK
CAL
D4 to D8
D0 to D3
10ns or more
N – 3
N – 2
N – 1
N
N + 1
N + 2
N + 3
N + 4
N + 5
N – 3
N – 2
N – 1
N
N + 5
Fig. 2. Calibration Timing Chart
Calibration starts when the falling edge of the pulse input to the CAL pin (Pin 41) is detected. Because the
lower comparator is occupied for four clock cycles at this point, the previous lower data is held for four clock
cycles after seven clock cycles since the rising edge of the clock cycle in which the falling edge of CAL was
detected. Calibration can be performed outside of video intervals by using the sync signal, etc., to input the
CAL signal. An example of this is shown below.
(1) Inputting CAL every H-sync
Input
CLK
CAL
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CXD2312R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:9-bit 20MSPS Video A/D Converter
CXD2314R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:9-bit 20MSPS Video A/D Converter
CXD2315Q 制造商:SONY 制造商全稱:Sony Corporation 功能描述:10-bit 80MSPS 1ch D/A Converter (Ultra-low Glitch Version)
CXD2400 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Controller for CCD cameras
CXD2400R 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Controller for CCD cameras