參數(shù)資料
型號(hào): CXD2436Q
廠商: Sony Corporation
英文描述: Timing Generator for LCD Panels(LCD面板的定時(shí)信號(hào)發(fā)生器)
中文描述: 時(shí)序發(fā)生器的液晶面板(液晶面板的定時(shí)信號(hào)發(fā)生器)
文件頁數(shù): 9/34頁
文件大小: 1758K
代理商: CXD2436Q
—9—
CXD2436Q
Description of Operation
Sync input pins
The CXD2436Q has three types of sync input pins.
Pin No.
Symbol
SLSY setting
HD1IN
VD1IN
CSYNC
HD2IN
VD2IN
1
2
5
16
17
H
L
SYNC input pins for VGA
CSYNC input pin for NTSC/PAL
Separate SYNC input pins for NTSC/PAL
Application
Clock input pins
The CXD2436Q has two clock input pin systems to support two types of PLL circuits.
1) When using EXT-CKI (using an external PLL IC)
The 1/N frequency divider output is output from the HDN and XHDN pins for the external PLL IC.
The used pins are shown in the following table. (SLCKI = Low)
EXT-CKI
HDN
XHDN
30
68
69
Clock input
Phase comparison output
(positive polarity)
Phase comparison output
(negative polarity)
Pin No.
Symbol
Application
400 clk
HSYNC
HDN OUTPUT
2) When using CKI
This system uses the built-in phase comparator and an externally attached VCO circuit (see the Application
Circuit).
This system is used during AV mode (NTSC/PAL).
The used pins are shown in the following table. (Effective when SLCKI is set to High.)
PEO
PWM
CKO
CKI
RPD
FPD
TC
31
32
33
34
35
38
39
Loop filter integrator output
Loop filter integrator input
Clock output (oscillation cell output)
Clock input (oscillation cell input)
Phase comparator output
Phase comparator output
FPD pin pulse width adjustment
Pin No.
Symbol
Application
HSYNC
RPD
FPD
An outline of the output waveforms during
PLL lock is shown in the figure to the left.
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CXD2437TQ 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor
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