- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378984 > CXD2452R (Sony Corporation) Timing Generator for Progressive Scan CCD Image Sensor PDF資料下載
參數(shù)資料
| 型號： | CXD2452R |
| 廠商： | Sony Corporation |
| 英文描述： | Timing Generator for Progressive Scan CCD Image Sensor |
| 中文描述： | 時序發(fā)生器傳感器逐行掃描CCD圖像 |
| 文件頁數(shù)： | 3/28頁 |
| 文件大小： | 356K |
| 代理商： | CXD2452R |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
– 3 –
CXD2452R
Pin Description
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
3MCK
Vss1
WEN
ID
TEST
V
DD
1
XCLPOB
V
DD
2
RG
Vss2
Vss3
H1
H2
V
DD
3
XCLPDM
V
DD
4
XSHP
XSHD
XRS
Vss4
PBLK
1/2MCK
3/2MCK
V
DD
5
RST
V
DD
6
SSI
SSK
SEN
EBCKSM
FRO
I
—
O
O
I
—
O
—
O
—
—
O
O
—
O
—
O
O
O
—
O
O
—
—
I
—
I
I
I
I
O
Internal main clock. (2340f
H
)
GND
Memory write timing.
Stop control possible using the serial interface data.
Vertical direction line identification pulse output.
Stop control possible using the serial interface data.
IC test pin; normally fixed to GND. (With pull-down resistor)
3.3V power supply. (Power supply for common logic block)
CCD optical black signal clamp pulse output.
Stop control possible using the serial interface data.
3.3V power supply. (Power supply for RG)
CCD reset gate pulse output. (780f
H
)
GND
GND
CCD horizontal register drive clock output. (780f
H
)
CCD horizontal register drive clock output. (780f
H
)
3.3V power supply. (Power supply for H1/H2)
Pulse output for dummy bit block clamp .
3.3V power supply. (Power supply for CDS system)
Precharge level sample-and-hold pulse output. (780f
H
)
Data level sample-and-hold pulse output. (780f
H
)
Sample-and-hold pulse output for analog/digital conversion phase alignment. (780f
H
)
GND
Pulse output for horizontal and vertical blanking interval pulse cleaning.
Horizontal direction pixel identification pulse output.
Stop control possible using the serial interface data.
System clock output for signal processing IC (1170f
H
).
Stop control possible using the serial interface data.
3.3V power supply. (Power supply for common logic block)
Internal system reset input. High: Normal status, Low: Reset status
Always input one reset pulse after power-on.
3.3V power supply. (Power supply for common logic block)
Serial interface data input for internal mode settings.
Serial interface clock input for internal mode settings.
Serial interface strobe input for internal mode settings.
CHKSUM enable. (With pull-down resistor)
High: Sum check invalid, Low: Sum check valid
Vertical sync signal output.
Stop control possible using the serial interface data.
Symbol
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2453Q | Timing Generator for LCD Panels |
| CXD2457R | Timing Generator for Progressive Scan CCD Image Sensor |
| CXD2460R | Timing Generator for Progressive Scan CCD Image Sensor |
| CXD2464R | Timing Generator for LCD Panels |
| CXD2467AQ | Digital Signal Driver/Timing Generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2453Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for LCD Panels |
| CXD2457R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor |
| CXD2458 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Color LCD Panels |
| CXD2458AR | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Color LCD Panels |
| CXD2460R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。