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參數(shù)資料
| 型號(hào)： | CXD2492R |
| 廠商： | Sony Corporation |
| 英文描述： | RES, WW 1W 4.02 OHM 1% 90PPM |
| 中文描述： | 時(shí)序發(fā)生器傳感器讀出CCD圖像幀 |
| 文件頁(yè)數(shù)： | 3/35頁(yè) |
| 文件大小： | 390K |
| 代理商： | CXD2492R |
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– 3 –
CXD2492R
Pin Description
GND
Internal system reset input. High: Normal operation, Low: Reset control
Normally apply reset during power-on.
Schmitt trigger input/No protective diode on power supply side
Control input used to switch sync system.
High: CKI sync, Low: MCKO sync
With pull-down resistor
Vertical direction line identification pulse output.
Memory write timing pulse output.
Internal SSG enable.
High: Internal SSG valid, Low: External sync valid
With pull-down resistor
3.3V power supply. (Power supply for common logic block)
3.3V power supply. (Power supply for RG)
CCD reset gate pulse output.
GND
GND
CCD horizontal register clock output.
CCD horizontal register clock output.
3.3 to 5.0V power supply. (Power supply for H1/H2)
3.3V power supply. (Power supply for CDS block)
CCD precharge level sample-and-hold pulse output.
CCD data level sample-and-hold pulse output.
Sample-and-hold pulse output for analog/digital conversion phase alignment.
Pulse output for horizontal and vertical blanking period pulse cleaning.
CCD dummy signal clamp pulse output.
GND
CCD optical black signal clamp pulse output.
Clock output for analog/digital conversion IC.
Logical phase adjustment possible using the serial interface data.
GND
Inverter output.
Inverter input.
Inverter output for oscillation.
When not used, leave open or connect a capacitor.
Inverter input for oscillation.
When not used, fix low.
3.3V power supply. (Power supply for common logic block)
System clock output for signal processing IC.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
SS
1
RST
SNCSL
ID
WEN
SSGSL
V
DD
1
V
DD
2
RG
V
SS
2
V
SS
3
H1
H2
V
DD
3
V
DD
4
XSHP
XSHD
XRS
PBLK
CLPDM
V
SS
4
OBCLP
ADCLK
V
SS
5
CKO
CKI
OSCO
OSCI
V
DD
5
MCKO
—
I
I
O
O
I
—
—
O
—
—
O
O
—
—
O
O
O
O
O
—
O
O
—
O
I
O
I
—
O
Pin
No.
Symbol
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2497R | Timing Generator for Frame Readout CCD Image Sensor |
| CXD2498R | Timing Generator for Frame Readout CCD Image Sensor |
| CXD2500AQ | CD DIGITAL SIGNAL PROCESSOR |
| CXD2500AQZ | CD DIGITAL SIGNAL PROCESSOR |
| CXD2500BQ | CD Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2497R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Frame Readout CCD Image Sensor |
| CXD2498R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Frame Readout CCD Image Sensor |
| CXD2500AQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR |
| CXD2500AQZ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR |
| CXD2500BQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
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