- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378985 > CXD2588Q (Sony Corporation) RESISTOR,MIL-PRF-39007/9 PDF資料下載
參數(shù)資料
| 型號(hào)： | CXD2588Q |
| 廠商： | Sony Corporation |
| 英文描述： | RESISTOR,MIL-PRF-39007/9 |
| 中文描述： | CD數(shù)字信號(hào)處理器，具有內(nèi)置數(shù)字伺服和DAC |
| 文件頁(yè)數(shù)： | 82/121頁(yè) |
| 文件大?。?/td> | 986K |
| 代理商： | CXD2588Q |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)當(dāng)前第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)
– 82 –
CXD2588Q/R
<Measurement>
VC AVRG
The offset can be canceled by measuring the VC level which is the center voltage for the system and using
that value to apply compensation to each input error signal.
FE AVRG
The FE signal DC level is measured. In addition, compensation is applied to the FZC comparator level output
from the SENS pin during FCS SEARCH (focus search) using these measurement results.
TE AVRG
The TE signal DC level is measured.
RF AVRG
The MIRR, DFCT and FOK signals are generated from the RF signal. Since the FOK signal is generated by
comparing the RF signal at a certain level, it is necessary to establish a zero level which becomes the
comparator level reference. Therefore, the RF signal is measured before playback, and is compensated to
take this level as the zero level.
An example of sending AVRG measurement and compensation commands is shown below.
(Example)
$380800 (RF AVRG measurement on)
$382000 (FE AVRG measurement on)
$380010 (TE AVRG measurement on)
$388000 (VC AVRG measurement on)
(Complete each AVRG measurement before starting the next.)
$38140A (RFLC, FLC0, FLC1 and TLC1 commands on)
(The required compensation should be turned on together; see Fig. 5-3.)
An interval of 5.8ms (when MCK = 128Fs) or more must be maintained between each command, or the SENS
pin must be monitored to confirm that the previous command has been completed before the next AVRG
command is sent.
<Compensation>
See Fig. 5-3 for the contents of each compensation below.
RFLC
The difference by which the RF signal exceeds the RF AVRG value is input to the RF In register.
(00 is input when the RF signal is lower than the RF AVRG value.)
TCL0
The value obtained by subtracting the VC AVRG value from the TE signal is input to the TRK In register.
TCL1
The value obtained by subtracting the TE AVRG value from the TE signal is input to the TRK In register.
VCLC
The value obtained by subtracting the VC AVRG value from the FE signal is input to the FCS In register.
FLC1
The value obtained by subtracting the FE AVRG value from the FE signal is input to the FCS In register.
FLC0
The value obtained by subtracting the FE AVRG value from the FE signal is input to the FZC register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2588R | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2589Q | CD Digital Signal Processor |
| CXD2598Q | CD Digital Signal Processor with Built-in Digital Servo and DAC(數(shù)字式CD信號(hào)處理器（內(nèi)置數(shù)字式伺服系統(tǒng)和D/A轉(zhuǎn)換器）) |
| CXD2598 | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2719Q | Single-Chip Dolby Pro Logic Surround Decoder(單片杜比環(huán)繞邏輯譯碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2588Q/R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CD Digital Signal Processor with Built-in DigitalServo and DAC |
| CXD2588R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2589Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor |
| CXD2597Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2598 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。