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參數(shù)資料
| 型號： | CXG1130AER |
| 廠商： | Sony Corporation |
| 英文描述： | Triple Low Noise Amplifier/Dual Mixer |
| 中文描述： | 三低噪聲放大器/雙攪拌機(jī) |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 125K |
| 代理商： | CXG1130AER |
–
5
–
CXG1130AER
Example of Representative Characteristics
1. CXG1130AER frequency characteristics of main items in LNA block (25°C)
[Condition] V
DD
= 3V, 800MHz_L (Pin 9 input
→
Pin 13 output): V
CTL
1 = 0V, V
CTL
2 = 0V,
800MHz_U (Pin 12 input
→
Pin 13 output): V
CTL
1 = 3V, V
CTL
2 = 0V,
1500MHz (Pin 7 input
→
Pin 6 output): V
CTL
2 = 3V
Gp and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression
ratio for two-wave input: f
RF
offset = 100kHz, P
RF
=
–
30dBm.
19
G
18
17
16
15
14
780
800
820
840
f [MHz]
Power gain Gp
860
880
900
920
800MHz (U)
800MHz (L)
2.5
N
2.0
1.5
1.0
0.5
0
780
800
820
840
f [MHz]
Noise figure NF
860
880
900
920
800MHz (U)
800MHz (L)
–
2
I
–
4
–
6
–
8
–
10
–
12
780
800
820
840
f [MHz]
Input IP3
860
880
900
920
800MHz (U)
800MHz (L)
19
G
18
17
16
15
14
1440
1460
f [MHz]
Power gain Gp
1480
1500
1520
1540
1500MHz
2.5
N
2.0
1.5
1.0
0.5
0
1440
1460
f [MHz]
Noise figure NF
1480
1500
1520
1540
1500MHz
–
2
I
–
4
–
6
–
8
–
10
–
12
1440
1460
f [MHz]
Input IP3
1480
1500
1520
1540
1500MHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXG1131ER | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:High Power 3 】 5 Antenna Switch MMIC with Integrated Control Logic |
| CXG1134AEN | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:High Power SPDT Switch with Logic Control |
| CXG1134EN | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:High Power SPDT Switch with Logic Control |
| CXG1140ER | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Triple Low Noise Amplifier/Dual Mixer |
| CXG1144AEN | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:High Power DPDT Switch with Logic Control |
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