參數(shù)資料
型號: CXG7001FN
廠商: Sony Corporation
英文描述: Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS
中文描述: 功率放大器/天線開關(guān)低噪聲下變頻混頻器的小靈通
文件頁數(shù): 1/8頁
文件大小: 117K
代理商: CXG7001FN
– 1 –
E04139-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG7001FN
26 pin HSOF (Plastic)
Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS
Notes on Handling
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Description
The CXG7001FN is a MMIC consisting of the
power amplifier, antenna switch and low noise down
conversion mixer.
This IC is designed using the Sony’s GaAs J-FET
process featuring a single positive power supply
operation.
Features
Operates at a single positive power supply: V
DD
= 3V
Small mold package: 26-pin HSOF
<Power amplifier/antenna switch transmitter block >
Low current consumption: I
DD
= 150mA
(P
OUT
= 20.2dBm, f = 1.9GHz)
High power gain: Gp = 39dB Typ.
(P
OUT
= 20.2dBm, f = 1.9GHz)
<Antenna switch receiver block/
low noise down conversion mixer>
Low current consumption: I
DD
= 5.5mA Typ.
(When no signal)
High conversion gain: Gc = 20.5dB Typ. (f = 1.9GHz)
Low distortion: Input IP3 = –13dBm Typ. (f = 1.9GHz)
High image suppression ratio: IMR = 40dBc Typ.
(f = 1.9GHz)
High 1/2 IF suppression ratio: 1/2IFR = 44dBc Typ.
(f = 1.9GHz)
Applications
Japan digital cordless telephones (PHS)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
<Power amplifier block>
Supply voltage
Voltage between gate and source
V
DD
6
V
V
GSO
VP
CTL
I
DD
1.5
2.5
550
V
V
Gain control voltage
Drain current
Allowable power dissipation
mA
P
D
3
W
<Switch block>
Control voltage
V
CTL
6
V
<Front-end block>
Supply voltage
Input power
V
DD
P
RF
6
V
+10
dBm
<Common to each block>
Channel temperature
Operating temperature
Storage temperature
Tch
Topr
Tstg
150
°C
°C
°C
–35 to +85
–65 to +150
Recommended Operating Conditions
<Common to each block>
Supply voltage
V
DD
2.7 to 3.3
V
<Power amplifier block>
Gain control voltage
VP
CTL
to V
DD
–1.0
V
<Switch block>
Control voltage (H)
Control voltage (L)
V
CTL
(H) 2.9 to 3.3
V
CTL
(L)
V
V
0 to 0.2
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