- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378988 > CXK77B3641AGB (Sony Corporation) 4Mb Late Write LVTTL High Speed Synchronous SRAMs (128K x 36Bit)(4M位、寫延遲、高速邏輯收發(fā)（HSTL）、高速同步靜態(tài)RAM (128K x 36位)) PDF資料下載
參數(shù)資料
| 型號： | CXK77B3641AGB |
| 廠商： | Sony Corporation |
| 英文描述： | 4Mb Late Write LVTTL High Speed Synchronous SRAMs (128K x 36Bit)(4M位、寫延遲、高速邏輯收發(fā)（HSTL）、高速同步靜態(tài)RAM (128K x 36位)) |
| 中文描述： | 4Mb的后寫入LVTTL高速（128K的x 36Bit）（4分位，寫延遲，高速邏輯收發(fā)（HSTL），高速同步靜態(tài)隨機存儲器（128K的× 36位）同步靜態(tài)存儲器） |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 222K |
| 代理商： | CXK77B3641AGB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
4Mb, Sync LW, LVTTL, rev 1.2
10 / 28
September 24, 1998
SONY
CXK77B3641AGB / CXK77B1841AGB
Preliminary
DC Recommended Operating Conditions
(
V
SS
= 0V
,
T
A
= 0 to 85
o
C)
(1)
V
DD
(Max) up to 3.78V is supported. 3.47V is recommended for power consumption purposes only.
(2)
For V
DDQ
= 2.5V or V
DDQ
= 3.3V applications.
(3)
V
IH
(Max) AC = V
DD
+ 1.5V for pulse width less than 2.0 ns.
(4)
V
IL
(Min) AC = -1.5V for pulse width less than 2.0 ns.
(5)
These devices support three different input clocking schemes:
a. LVTTL Differential -
In this scheme, both clock inputs (K and K) are driven differentially to the same voltage
levels as the other inputs, i.e. from V
SS
to V
DDQ
nominally. V
KIN
, V
DIF
, and V
CM
must all
be considered when using this scheme.
b. LVTTL Single Ended - In this scheme, one of the two clock inputs (either K or K) is driven to the same voltage
levels as the other inputs, i.e. from V
SS
to V
DDQ
nominally, while the other clock input (ei-
ther K or K) is tied to an external reference voltage (V
X
). V
KIN
, V
DIF
, and V
X
must all be
considered when using this scheme.
c. PECL Differential -
In this scheme, both clock inputs (K and K) are driven differentially according to PECL
guidelines. Both V
IH-PECL
and V
IL-PECL
must be considered when using this scheme.
I/O Capacitance
(T
A
= 25
o
C, f = 1 MHz)
Note: These parameters are sampled and are not 100% tested.
Item
Symbol
Min
Typ
Max
Unit
Supply Voltage
(1)
V
DD
3.13
3.3
3.47
V
Output Supply Voltage
(2)
V
DDQ
2.37
2.5, 3.3
3.47
V
Input High Voltage
(3)
V
IH
1.65
---
V
DD
+ 0.3
V
Input Low Voltage
(4)
V
IL
-0.3
---
1.15
V
Clock
(5)
LVTTL
Input Signal Voltage
V
KIN
-0.3
---
V
DD
+ 0.3
V
Input Differential Voltage
V
DIF
0.5
---
V
DD
+ 0.6
V
Input Common Mode Voltage
V
CM
1.15
1.4
1.75
V
Input Cross Point Voltage
V
X
1.15
1.4
1.75
V
PECL
Input High Voltage
V
IH-PECL
2.135
---
2.420
V
Input Low Voltage
V
IL-PECL
1.480
---
1.825
V
Item
Symbol
Test conditions
Min
Max
Unit
Input Capacitance
C
IN
C
CLK
C
OUT
V
IN
= 0V
V
IN
= 0V
V
OUT
= 0V
---
6
pF
Clock Input Capacitance
---
6
pF
Output Capacitance
---
7
pF
相關PDF資料 |
PDF描述 |
|---|---|
| CXK77B1841GB | 4Mb Late Write LVTTL High Speed Synchronous SRAM (256K x 18Bit)(4M位、寫延遲、LVTTL高速同步靜態(tài)RAM (256K x 18位)) |
| CXK77B3611AGB- | High Speed Bi-CMOS Synchronous Static RAM |
| CXK77B3611AGB-5 | High Speed Bi-CMOS Synchronous Static RAM |
| CXK77B3611AGB-6 | High Speed Bi-CMOS Synchronous Static RAM |
| CXK77B3611AGB | High Speed 1MBit Bi-CMOS Synchronous Static RAM(高速1M位、Bi-CMOS同步靜態(tài)RAM) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CXK77B3641GB-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM |
| CXK77B3641GB-6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x36 Fast Synchronous SRAM |
| CXK77K18R320GB | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:32Mb LW R-R HSTL High Speed Synchronous SRAM (2Mb x 18) |
| CXK77K18R320GB-3 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:32Mb LW R-R HSTL High Speed Synchronous SRAM (2Mb x 18) |
| CXK77K18R320GB-33 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:32Mb LW R-R HSTL High Speed Synchronous SRAM (2Mb x 18) |
發(fā)布緊急采購，3分鐘左右您將得到回復。