參數(shù)資料
型號: CY25566SC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Spread Spectrum Clock Generator
中文描述: 200 MHz, OTHER CLOCK GENERATOR, PDSO16
封裝: 0.150 INCH, SOIC-16
文件頁數(shù): 4/9頁
文件大?。?/td> 116K
代理商: CY25566SC
CY25566
Document #: 38-07429 Rev. *A
Page 4 of 9
Modulation Rate
Spread Spectrum clock generators utilize frequency
modulation (FM) to distribute energy over a specific band of
frequencies. The maximum frequency of the clock (Fmax) and
minimum frequency of the clock (Fmin) determine this band of
frequencies. The time required to transition from Fmin to Fmax
and back to Fmin is the period of the Modulation Rate, Tmod.
Modulation Rates of SSCG clocks are generally referred to in
terms of frequency or Fmod = 1/Tmod.
The input clock frequency, Fin, and the internal divider count,
Cdiv, determine the Modulation Rate. The CY25566 utilizes
two different modulation rate dividers, depending on the range
selected on S2 and S3 digital control inputs. Refer to the
example below.
The CY25566 has three frequency groups to select from. Each
combination of frequency and bandwidth can be selected by
programming the input control lines, S0
S3, to the proper logic
state.
Group 1 is the 1X low-frequency range and operates from 25
to 100 MHz.
Group 2 is the 1X high-frequency range and operates from 50
to 200 MHz.
Group 3 is the 2X low frequency range and operates from 25
to 50 MHz and 50 to 100 MHz output.
S3, S2
0,0
0,1
1,0
1,1
CDiv
1166
1166
2332
N/A
Output Frequency
1X
2X
1X
N/A
Example:
Device = CY25566
Fin = 65 MHz
Range = S3 = 0, S2 = 1, S0 = 0
Then: modulation rate = Fmod = 65 MHz/1166 = 55.7 kHz
Modulation Profile
Spectrum Analyzer
Figure 3. SSCG Clock, CY25566, 65 MHz
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