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參數(shù)資料
| 型號(hào)： | CY25702 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Programmable High-Frequency Crystal Oscillator (XO) |
| 中文描述： | 可編程高頻晶體振蕩器（XO） |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大?。?/td> | 124K |
| 代理商： | CY25702 |
CY25702
Document #: 38-07721 Rev. **
Page 2 of 7
Functional Description
The CY25702 is a Crystal Oscillator (XO).
The device uses a Cypress proprietary PLL to synthesize the
frequency of the embedded input crystal.
The CY25702 uses a programmable configuration memory
array to synthesize output frequency.
The frequency CLK output can be programmed from 10–125
MHz.
The CY25702 is available in a 4-pin plastic SMD packages
with operating temperature range of –20 to 70°C.
Programming Description
Field/Factory-Programmable CY25702
Field/Factory programming is available for samples and
manufacturing by Cypress and its distributors. All requests
must be submitted to the local Cypress Field Application
Engineer (FAE) or sales representative. Once the request has
been processed, you will receive a new part number, samples,
and data sheet with the programmed values. This part number
will be used for additional sample requests and production
orders.
Additional information on the CY25702 can be obtained from
the Cypress web site at www.cypress.com.
Output Frequency, CLK Output (CLK, pin 3)
The frequency at the CLK output is produced by synthesizing
the embedded crystal oscillator frequency input. The range of
Operating Conditions
synthesized clock is from 1–125MHz when VDD= 5V and
1–90MHz when VDD = 3.3V.
Output Enable or Power Down (OE/PD#, pin 1)
Pin 1 can be programmed as either output enable (OE) or
Power Down (PD#).
Absolute Maximum Rating
Supply Voltage (VDD).....................................–0.5V to +7.0V
DC Input Voltage ................................... –0.5V to V
DD
+ 0.5V
Storage Temperature (Non-condensing) .... –55°C to +100°C
Junction Temperature................................ –40°C to +125°C
Data Retention @ Tj = 125
°
C................................> 10 years
Package Power Dissipation......................................350 mW
Pin Definition
Pin
Name
Description
1
OE/PD#
Output Enable pin
:
Active HIGH
. If OE = 1, CLK is enabled.
Power Down pin
:
Active LOW
. If PD# = 0, Power Down is enabled.
Power supply ground
.
Clock output
.
3.3V or 5.0V power supply
.
2
3
4
VSS
CLK
VDD
Table 1. Programming Data Requirement
Pin Function
Pin Name
Pin#
Units
Program Value
Output Frequency
CLK
3
MHz
ENTER DATA
Output Enable/Power Down
OE/PD#
1
N/A
ENTER DATA
Power Supply
VDD
4
V
ENTER DATA
Parameter
V
DD1
V
DD2
T
A
C
LOAD
F
CLK1
F
CLK2
T
PU
Description
Min.
3.00
4.50
–20
–
1.0
1.0
0.05
Typ.
3.30
5.00
–
–
–
–
–
Max.
3.60
5.50
70
15
125
90
500
Unit
V
V
°C
pF
MHz
MHz
ms
Supply Voltage Range
Supply Voltage Range
Ambient Temperature
Max. Load Capacitance @ pin 3
CLK output frequency, C
LOAD
= 15 pF, VDD = 5.0V
CLK output frequency, C
LOAD
= 15 pF, , VDD = 3.3V
Power-up time for VDD to reach minimum specified
voltage (power ramp must be monotonic)
DC Electrical Characteristics
Parameter
V
OH1
V
OL1
Description
Condition
Min.
V
DD
-0.4
–
Typ.
–
–
Max.
–
0.4
Unit
V
V
High Output Voltage
Low Output Voltage
V
DD
= 5.0V, I
OH
= –16mA
V
DD
= 5.0V , I
OL
= 16mA
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| CY25702_06 | 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Programmable High-Frequency Crystal Oscillator (XO) |
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