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參數(shù)資料
| 型號： | CY28326OC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | FTG for VIA PT880 Serial Chipset |
| 中文描述： | 333.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 288K |
| 代理商： | CY28326OC |
CY28326
Document #: 38-07616 Rev. *A
Page 17 of 23
Absolute Maximum Conditions
280us
VTT_PWRGD
Situation 3 : Power on & Ratio PIN switch to PCI clock
VCC3
1
Ratio Select PIN
When Power up Ratio Select PIN ="Hi" then
PIN19,PIN20 become PCI clock PIN
1ms
System Power
OK
PCI RESET
20us
POR(Power On
Reset)
(PIN20)Ratio1/
PCI6
(PIN19)Ratio0/
PCI5
MODE
Figure 14. Power on & Ratio PIN switch to PCI clock
Parameter
V
DD
V
DDA
V
IN
T
S
T
A
T
J
ESD
HBM
JC
JA
UL–94
MSL
Description
Condition
Min.
–0.5
–0.5
–0.5
–65
0
–
2000
Max.
4.6
4.6
V
DD
+ 0.5
+150
70
150
–
36.92
83.52
V–0
1
Unit
V
V
VDC
°C
°C
°C
V
°C/W
°C/W
Core Supply Voltage
Analog Supply Voltage
Input Voltage
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
ESD Protection (Human Body Model)
Dissipation, Junction to Case
Dissipation, Junction to Ambient
Flammability Rating
Moisture Sensitivity Level
Relative to V
SS
Non Functional
Functional
Functional
MIL-STD-883, Method 3015
Mil-Spec 883E Method 1012.1
JEDEC (JESD 51)
At 1/8 in.
Multiple Supplies:
The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
Parameter
V
DD
, V
DDA
V
ILI2C
V
IHI2C
V
IL
Description
Condition
Min.
3.135
–
2.2
V
SS
–0.5
Max.
3.465
1.0
–
0.8
Unit
V
V
V
V
3.3 Operating Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
3.3V ± 5%
SDATA, SCLK
SDATA, SCLK
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28326OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
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| CY28326OXCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326SPC | 制造商:Cypress Semiconductor 功能描述: |
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