參數(shù)資料
型號: CY28419OXCT
廠商: Silicon Laboratories Inc
文件頁數(shù): 6/15頁
文件大?。?/td> 0K
描述: IC CLOCK SRC CK409B 56SSOP
標準包裝: 1,000
類型: *
PLL:
輸入: 晶體
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:25
差分 - 輸入:輸出: 無/是
頻率 - 最大: 400MHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
CY28419
......................Document #: 38-07444 Rev. *D Page 14 of 15
Test and Measurement Set-up
For Differential CPU and SRC Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
CP UT
T
PCB
T
PCB
CPUC
M easur em ent
Po in t
2pF
IR E F
M eas ur em ent
Po in t
2pF
Figure 7. 0.7V Load Configuration
2.0V
0.8V
3.3V
0V
Tr
Tf
1.5V
3. 3V sig n a l s
tD C
P robe
O u tput under T e st
Load C a p
-
Figure 8. Lumped Load For Single-ended Output Signals (for AC Parameters Measurement)
Table 10.CPU Clock Current Select Function
Board Target Trace/Term Z
Reference R, Iref – VDD (3*Rr)
Output Current
Voh @ Z
50 Ohms
RREF = 475 1%, IREF = 2.32 mA
Ioh = 6*Iref
0.7V @ 50
Ordering Information
Part Number
Package Type
Product Flow
CY28419OC
56-pin Shrunk Small Outline package (SSOP)
Commercial, 0
to 70C
CY28419OCT
56-pin Shrunk Small Outline package (SSOP) – Tape and Reel
Commercial, 0
to 70C
CY28419ZC
56-pin Thin Shrunk Small Outline package (TSSOP)
Commercial, 0
to 70C
CY28419ZCT
56-pin Thin Shrunk Small Outline package (TSSOP) – Tape and Reel Commercial, 0
to 70C
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