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參數(shù)資料
| 型號： | CY62127DV30 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1 Mb (64K x 16) Static RAM |
| 中文描述： | 1字節(jié)（64K的× 16）靜態(tài)RAM |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 384K |
| 代理商： | CY62127DV30 |
CY62127DV30
MoBL
Document #: 38-05229 Rev. *D
Page 7 of 12
Write Cycle No. 1 (WE Controlled)
[14, 15,
19, 20, 21]
Write Cycle No. 2 (CE Controlled)
[14, 15,
19, 20, 21]
Notes:
19.Data I/O is high-impedance if OE = V
.
20.If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
21.During the DON'T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Switching Waveforms
(continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
BHE/BLE
t
BW
DON'T CARE
t
HD
t
SD
t
PWE
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
ADDRESS
WE
DATA I/O
OE
BHE/BLE
t
BW
t
SA
DON'T CARE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY62127DV30L | 1 Mb (64K x 16) Static RAM |
| CY62127DV30L-55BVI | 1 Mb (64K x 16) Static RAM |
| CY62127BV | 64K x 16 Static RAM |
| CY62127BVLL-55BAI | 64K x 16 Static RAM |
| CY62127BVLL-55ZI | 64K x 16 Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62127DV30_06 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1-Mb (64K x 16) Static RAM |
| CY62127DV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1-Mb (64K x 16) Static RAM |
| CY62127DV30L | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 Mb (64K x 16) Static RAM |
| CY62127DV30L-55BAI | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 2.5V/3.3V 1MBIT 64KX16 55NS 48FBGA - Bulk |
| CY62127DV30L-55BAIT | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 2.5V/3.3V 1MBIT 64KX16 55NS 48FBGA - Tape and Reel |
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