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參數(shù)資料
| 型號： | CY62127DV30LL-55BVXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 1 Mb (64K x 16) Static RAM |
| 中文描述： | 64K X 16 STANDARD SRAM, 55 ns, PBGA48 |
| 封裝： | 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 384K |
| 代理商： | CY62127DV30LL-55BVXI |
CY62127DV30
MoBL
Document #: 38-05229 Rev. *D
Page 6 of 12
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
[16,17]
Read Cycle No. 2 (OE Controlled)
[16,17, 18]
Notes:
16.Device is continuously selected. OE, CE = V
IL
, BHE, BLE = V
IL
.
17.WE is HIGH for Read cycle.
18.Address valid prior to or coincident with CE, BHE, BLE transition LOW.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
t
RC
t
AA
t
OHA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY62127DV30LL-55BVXIT | 功能描述:靜態(tài)隨機存取存儲器 SLO 3.0V SUPER LO PWR 64KX16 靜態(tài)隨機存取存儲器 IND RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY62127DV30LL-55XIKA | 制造商:Cypress Semiconductor 功能描述: |
| CY62127DV30LL-55ZI | 制造商:Rochester Electronics LLC 功能描述:1MB (64K X 16)- 3.0V SLOW ASYNCH SRAM - Bulk |
| CY62127DV30LL-55ZIT | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Async Single 2.5V/3.3V 1M-Bit 64K x 16 55ns 44-Pin TSOP-II T/R |
| CY62127DV30LL-55ZSI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1 Mb (64K x 16) Static RAM |
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