參數(shù)資料
型號(hào)： CY62136VNLL-70BAXA
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 2-Mbit (128K x 16) Static RAM
中文描述： 128K X 16 STANDARD SRAM, 70 ns, PBGA48
封裝： 7 X 7 MM, LEAD FREE, FBGA-48
文件頁(yè)數(shù)： 1/12頁(yè)
文件大?。?/td> 569K
代理商： CY62136VNLL-70BAXA
2-Mbit (128K x 16) Static RAM
CY62136VN MoBL
Cypress Semiconductor Corporation
Document #: 001-06510 Rev. *A
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised August 3, 2006
Features
Temperature Ranges
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
High speed: 55 ns
Wide voltage range: 2.7V–3.6V
Ultra-low active, standby power
Easy memory expansion with CE and OE features
TTL-compatible inputs and outputs
Automatic power-down when deselected
CMOS for optimum speed/power
Available in standard Pb-free 44-pin TSOP Type II,
Pb-free and non Pb-free 48-ball FBGA packages
Functional Description
[1]
The CY62136VN is a high-performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life
(MoBL
) in
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption by 99% when addresses are not
toggling. The device can also be put into standby mode when
deselected (CE HIGH). The input/output pins (I/O
0
through
I/O
15
) are placed in a high-impedance state when: deselected
(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is
written into the location specified on the address pins (A
0
through A
16
). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
0
to I/O
7
. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O
8
to I/O
15
. See
the Truth Table at the back of this data sheet for a complete
description of read and write modes.
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Logic Block Diagram
128K x 16
RAM Array
I/O
0
– I/O
7
R
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
COLUMN DECODER
A
1
A
1
A
1
A
1
A
1
S
DATA IN DRIVERS
OE
BLE
I/O
8
– I/O
15
CE
WE
BHE
A
1
A
0
A
9
A
10
WE
A
16
A
15
A
14
A
13
A
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
31
30
32
36
35
34
33
37
40
39
38
Top View
TSOP II (Forward)
41
44
43
42
16
17
29
28
V
CC
V
SS
I/O
4
I/O
5
A
4
A
3
A
2
A
1
A
0
OE
BHE
BLE
V
SS
V
CC
I/O
11
I/O
10
I/O
9
I/O
8
A
5
A
6
A
7
I/O
15
I/O
14
I/O
13
I/O
12
CE
I/O
0
I/O
1
I/O
2
I/O
3
NC
A
8
A
9
A
10
A
11
18
19
20
21
27
26
25
24
22
23
NC
I/O
6
I/O
7
PinConfigurations
[3]
[+] Feedback
相關(guān)PDF資料
PDF描述
CY62136VN 2-Mbit (128K x 16) Static RAM
CY62136VNLL-55BAI 2-Mbit (128K x 16) Static RAM
CY62136VNLL-55ZSXA 2-Mbit (128K x 16) Static RAM
CY62136VNLL-55ZXI 2-Mbit (128K x 16) Static RAM
CY62136VNLL-70BAI 2-Mbit (128K x 16) Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY62136VNLL-70BAXAT 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 SLO 3.0V SUPER LO PWR 128K X 16 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY62136VNLL-70BIA 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述:
CY62136VNLL-70ZSXA 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 SLO 3.0V SUPER LO PWR 128K X 16 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY62136VNLL-70ZSXAT 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 SLO 3.0V SUPER LO PWR 128K X 16 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY62136VNLL-70ZSXE 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 SLO 3.0V SUPER LO PWR 128K X 16 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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