參數(shù)資料
型號: CY7C1009B-20VXC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 128K X 8 STANDARD SRAM, 20 ns, PDSO32
封裝: 0.300 INCH, LEAD FREE, SOJ-32
文件頁數(shù): 6/10頁
文件大?。?/td> 362K
代理商: CY7C1009B-20VXC
CY7C109B
CY7C1009B
Document #: 38-05038 Rev. *C
Page 5 of 10
Write Cycle No. 1 (CE1 or CE2 Controlled)
[13, 14]
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[13, 14]
Notes:
13. Data I/O is high impedance if OE = VIH.
14. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
15. During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
tWC
DATA VALID
tAW
tSA
tPWE
tHA
tHD
tSD
tSCE
CE1
ADDRESS
CE2
WE
DATA I/O
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
DATAIN VALID
CE1
ADDRESS
CE2
WE
DATA I/O
OE
NOTE 15
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