參數(shù)資料
型號(hào): CY7C1168V18-333BZXI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
中文描述: 1M X 18 DDR SRAM, 0.45 ns, PBGA165
封裝: 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
文件頁(yè)數(shù): 18/27頁(yè)
文件大?。?/td> 648K
代理商: CY7C1168V18-333BZXI
CY7C1166V18, CY7C1177V18
CY7C1168V18, CY7C1170V18
Document Number: 001-06620 Rev. *D
Page 25 of 27
333
CY7C1166V18-333BZC
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)
Commercial
CY7C1177V18-333BZC
CY7C1168V18-333BZC
CY7C1170V18-333BZC
CY7C1166V18-333BZXC
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free
CY7C1177V18-333BZXC
CY7C1168V18-333BZXC
CY7C1170V18-333BZXC
CY7C1166V18-333BZI
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)
Industrial
CY7C1177V18-333BZI
CY7C1168V18-333BZI
CY7C1170V18-333BZI
CY7C1166V18-333BZXI
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free
CY7C1177V18-333BZXI
CY7C1168V18-333BZXI
CY7C1170V18-333BZXI
300
CY7C1166V18-300BZC
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)
Commercial
CY7C1177V18-300BZC
CY7C1168V18-300BZC
CY7C1170V18-300BZC
CY7C1166V18-300BZXC
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free
CY7C1177V18-300BZXC
CY7C1168V18-300BZXC
CY7C1170V18-300BZXC
CY7C1166V18-300BZI
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm)
Industrial
CY7C1177V18-300BZI
CY7C1168V18-300BZI
CY7C1170V18-300BZI
CY7C1166V18-300BZXI
51-85180 165-Ball Fine Pitch Ball Grid Array (13 x 15 x 1.4 mm) Pb-Free
CY7C1177V18-300BZXI
CY7C1168V18-300BZXI
CY7C1170V18-300BZXI
Ordering Information (continued)
Not all of the speed, package and temperature ranges are available. Contact your local sales representative or visit www.cypress.com
for actual products offered.
Speed
(MHz)
Ordering Code
Package
Diagram
Package Type
Operating
Range
相關(guān)PDF資料
PDF描述
CY7C1170V18-300BZC 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1170V18-300BZI 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1170V18-300BZXC 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1170V18-300BZXI 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
CY7C1170V18-333BZC 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C1168V18-375BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Q2+ B2 (2.5) RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1168V18-375BZXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Q2+, B2 (2.5) RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1168V18-400BZC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Q2+, B2 (2.5) RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1168V18-400BZCES 制造商:Cypress Semiconductor 功能描述:
CY7C1168V18-400BZXC 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 18M Q2+, B2 (2.5) RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray