參數(shù)資料
型號(hào): CY7C1316V18
英文描述: Memory
中文描述: 內(nèi)存
文件頁(yè)數(shù): 5/9頁(yè)
文件大?。?/td> 194K
代理商: CY7C1316V18
CY7C1019B/
CY7C10191B
Document #: 38-05026 Rev. *A
Page 5 of 9
Write Cycle No. 1 (CE Controlled)[12, 13]
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[12, 13]
Notes:
12. Data I/O is high impedance if OE = VIH.
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
14. During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
tWC
DATA VALID
tAW
tSA
tPWE
tHA
tHD
tSD
tSCE
CE
ADDRESS
WE
DATA I/O
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
DATAIN VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 14
相關(guān)PDF資料
PDF描述
CY7C1318V18 Memory
CY7C132-35FMB x8 Dual-Port SRAM
CY7C132-35LC x8 Dual-Port SRAM
CY7C132-35LMB x8 Dual-Port SRAM
CY7C132-35PC x8 Dual-Port SRAM
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