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參數(shù)資料
| 型號： | CY7C132-55DC |
| 英文描述： | x8 Dual-Port SRAM |
| 中文描述： | x8雙端口SRAM |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 194K |
| 代理商： | CY7C132-55DC |
CY7C1019B/
CY7C10191B
Document #: 38-05026 Rev. *A
Page 5 of 9
Write Cycle No. 1 (CE Controlled)[12, 13]
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[12, 13]
Notes:
12. Data I/O is high impedance if OE = VIH.
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
14. During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
tWC
DATA VALID
tAW
tSA
tPWE
tHA
tHD
tSD
tSCE
CE
ADDRESS
WE
DATA I/O
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
DATAIN VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 14
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C132-55DI | x8 Dual-Port SRAM |
| CY7C132-55FMB | x8 Dual-Port SRAM |
| CY7C132-55LC | x8 Dual-Port SRAM |
| CY7C132-55LMB | x8 Dual-Port SRAM |
| CY7C132-55PC | IC-2KX8 DUAL PORT RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C132-55PC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1325A-100AC | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 4.5M-Bit 256K x 18 8ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C1325A-117AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY7C1325B100AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1325B-100AC | 制造商:Cypress Semiconductor 功能描述:Cache Mem 4.5M-Bit 3.3V SRAM 100-Pin TQFP 制造商:CPYR 功能描述:Synchronous SRAM, 256K x 18, 100 Pin, Plastic, QFP 制造商:Cypress Semiconductor 功能描述:Synchronous SRAM, 256K x 18, 100 Pin, Plastic, QFP |
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