參數(shù)資料
型號： CY7C1414BV18-167BZI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： DRAM
英文描述： 36-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
中文描述： 1M X 36 QDR SRAM, 0.5 ns, PBGA165
封裝： 15 X 17 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁數(shù)： 10/26頁
文件大小： 1072K
代理商： CY7C1414BV18-167BZI
PRELIMINARY
CY7C1410BV18
CY7C1425BV18
CY7C1412BV18
CY7C1414BV18
Document #: 001-07036 Rev. *B
Page 10 of 26
Write Cycle Descriptions
(CY7C1410BV18 and CY7C1412BV18)
[2, 8]
BWS
0
/
NWS
0
L
BWS
1
/
NWS
1
L
K
K
–
Comments
L-H
During the Data portion of a Write sequence
:
CY7C1410BV18
both nibbles (D
[7:0]
) are written into the device,
CY7C1412BV18
both bytes (D
[17:0]
) are written into the device.
During the Data portion of a Write sequence
:
CY7C1410BV18
both nibbles (D
[7:0]
) are written into the device,
CY7C1412BV18
both bytes (D
[17:0]
) are written into the device.
During the Data portion of a Write sequence
:
CY7C1410BV18
only the lower nibble (D
[3:0]
) is written into the device.
D
[7:4]
will remain unaltered,
CY7C1412BV18
only the lower byte (D
[8:0]
) is written into the device.
D
[17:9]
will remain unaltered.
During the Data portion of a Write sequence
:
CY7C1410BV18
only the lower nibble (D
[3:0]
) is written into the device.
D
[7:4]
will remain unaltered,
CY7C1412BV18
only the lower byte (D
[8:0]
) is written into the device.
D
[17:9]
will remain unaltered.
During the Data portion of a Write sequence
:
CY7C1410BV18
only the upper nibble (D
[7:4]
) is written into the device.
D
[3:0]
will remain unaltered,
CY7C1412BV18
only the upper byte (D
[17:9]
) is written into the device.
D
[8:0]
will remain unaltered.
During the Data portion of a Write sequence
:
CY7C1410BV18
only the upper nibble (D
[7:4]
) is written into the device.
D
[3:0]
will remain unaltered,
CY7C1412BV18
only the upper byte (D
[17:9]
) is written into the device.
D
[8:0]
will remain unaltered.
No data is written into the devices during this portion of a Write operation.
No data is written into the devices during this portion of a Write operation.
L
L
–
L-H
L
H
L-H
–
L
H
–
L-H
H
L
L-H
–
H
L
–
L-H
H
H
H
H
L-H
–
–
L-H
Write Cycle Descriptions
(CY7C1425BV18)
[2, 8]
BWS
0
L
K
K
–
Comments
L-H
During the Data portion of a Write sequence
:
CY7C1425BV18 - the single byte (D[8:0]) is written into the device
During the Data portion of a Write sequence
:
CY7C1425BV18 - the single byte (D[8:0]) is written into the device
No data is written into the devices during this portion of a Write operation.
No data is written into the devices during this portion of a Write operation.
L
–
L-H
H
H
L-H
–
–
L-H
Note:
8. Assumes a Write cycle was initiated per the Write Port Cycle Description Truth Table. NWS
0
, NWS
1
, BWS
0
, BWS
1
, BWS
2
and BWS
3
can be altered on different
portions of a Write cycle, as long as the set-up and hold requirements are achieved.
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相關(guān)PDF資料
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CY7C1414BV18-167BZXI 36-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
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CY7C1414BV18-200BZC 功能描述:靜態(tài)隨機存取存儲器 1Mx36 QDR II Burst 2 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1414BV18-200BZI 功能描述:靜態(tài)隨機存取存儲器 1Mx36 QDR II Burst 2 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1414BV18-200BZXI 功能描述:靜態(tài)隨機存取存儲器 1Mx36 QDR II Burst 2 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1414BV18-250BZC 功能描述:靜態(tài)隨機存取存儲器 1Mx36 QDR II Burst 2 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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