型號: | CY7C335-50LMB |
英文描述: | UV-Erasable/OTP PLD |
中文描述: | UV-Erasable/OTP可編程邏輯器件 |
文件頁數(shù): | 7/12頁 |
文件大?。?/td> | 858K |
代理商: | CY7C335-50LMB |
相關(guān)PDF資料 |
PDF描述 |
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CY7C335-50PI | UV-Erasable/OTP PLD |
CY7C335-50QMB | UV-Erasable/OTP PLD |
CY7C335-50WC | UV-Erasable/OTP PLD |
CY7C335-50WI | UV-Erasable/OTP PLD |
CY7C335-66DI | UV-Erasable/OTP PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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CY7C335-66PC | 制造商:Cypress Semiconductor 功能描述:CPLD CY7C330 Family 12 Macro Cells 5V 28-Pin PDIP 制造商:QP Semiconductor 功能描述:CYP 7C335 DIE COMM-PDIP |
CY7C335-83JC | 制造商:Cypress Semiconductor 功能描述:CPLD CY7C330 Family 12 Macro Cells 5V 28-Pin PLCC |
CY7C34125JI | 制造商:Cypress Semiconductor 功能描述: |
CY7C341-25JI | 制造商:Cypress Semiconductor 功能描述:CPLD MAX |
CY7C341-25RC | 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin Windowed PGA |