參數(shù)資料
型號: CY7C341-25JC
英文描述: UV-Erasable/OTP Complex PLD
中文描述: UV-Erasable/OTP復(fù)雜可編程邏輯器件
文件頁數(shù): 4/12頁
文件大?。?/td> 858K
代理商: CY7C341-25JC
相關(guān)PDF資料
PDF描述
CY7C341-25RC
CY7C341-25RI UV-Erasable/OTP Complex PLD
CY7C341-30GC UV-Erasable/OTP Complex PLD
CY7C341-30JC UV-Erasable/OTP Complex PLD
CY7C341-30JI UV-Erasable/OTP Complex PLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C34125JI 制造商:Cypress Semiconductor 功能描述:
CY7C341-25JI 制造商:Cypress Semiconductor 功能描述:CPLD MAX
CY7C341-25RC 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin Windowed PGA
CY7C341-30HMB 制造商:Cypress Semiconductor 功能描述:CPLD MAX 制造商:Rochester Electronics LLC 功能描述:CPLD - Bulk
CY7C341-30JC 制造商:Cypress Semiconductor 功能描述:CPLD MAX? Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin PLCC